mb/gigabyte/ga-g41m-es2l: Fix ACPI IRQ settings for SATA
Previously, due to a bug in devicetree and incorrect IRQ settings in ACPI, SATA controller would not initialize any HDDs in the OS, even though it worked in SeaBIOS. The devicetree setting is not needed because SATA must function in "plain" mode on this board, as "combined" mode does not work at all. Change-Id: I0036c4734de00b84cc3d64f38e4b1fd80fd1a25d Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/14776 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@ -22,28 +22,35 @@ Method(_PRT)
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Return (Package() {
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/* Internal GFX */
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Package() { 0x0002ffff, 0, 0, 16 },
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Package() { 0x0002ffff, 1, 0, 17 },
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Package() { 0x0002ffff, 2, 0, 18 },
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Package() { 0x0002ffff, 3, 0, 19 },
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/* High Definition Audio 0:1b.0 */
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Package() { 0x001bffff, 0, 0, 22 },
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Package() { 0x001bffff, 0, 0, 16 },
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/* PCIe Root Ports 0:1c.x */
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Package() { 0x001cffff, 0, 0, 16 },
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Package() { 0x001cffff, 1, 0, 17 },
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Package() { 0x001cffff, 2, 0, 18 },
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Package() { 0x001cffff, 3, 0, 19 },
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Package() { 0x001cffff, 0, 0, 16 },
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Package() { 0x001cffff, 1, 0, 17 },
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/* USB and EHCI 0:1d.x */
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Package() { 0x001dffff, 0, 0, 23 },
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Package() { 0x001dffff, 1, 0, 19 },
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Package() { 0x001dffff, 2, 0, 18 },
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Package() { 0x001dffff, 3, 0, 16 },
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Package() { 0x001dffff, 0, 0, 23 },
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/* SMBUS/SATA/PATA 0:1f.2, 0:1f.3 */
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Package() { 0x001fffff, 1, 0, 19 },
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Package() { 0x001fffff, 1, 0, 19 },
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Package() { 0x001fffff, 0, 0, 18 },
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Package() { 0x001fffff, 1, 0, 19 },
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Package() { 0x001fffff, 1, 0, 19 },
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})
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} Else {
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Return (Package() {
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/* Internal GFX */
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Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
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Package() { 0x0002ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
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Package() { 0x0002ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
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Package() { 0x0002ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
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/* High Definition Audio 0:1b.0 */
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Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
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/* PCIe Root Ports 0:1c.x */
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@ -51,16 +58,17 @@ Method(_PRT)
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Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
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Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
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Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
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Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
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Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
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/* USB and EHCI 0:1d.x */
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Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },
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Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },
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Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
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Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },
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Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },
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/* SMBUS/SATA/PATA 0:1f.2, 0:1f.3 */
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Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },
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Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },
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Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },
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Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },
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Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },
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})
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}
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}
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@ -46,10 +46,10 @@ chip northbridge/intel/x4x # Northbridge
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register "pirqf_routing" = "0x0b"
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register "pirqg_routing" = "0x0b"
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register "pirqh_routing" = "0x0b"
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register "ide_legacy_combined" = "0x1"
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register "ide_legacy_combined" = "0x0" # Combined mode broken
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register "ide_enable_primary" = "0x1"
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register "ide_enable_secondary" = "0x0"
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register "sata_ahci" = "0x0"
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register "sata_ahci" = "0x0" # AHCI does not work
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register "sata_ports_implemented" = "0x3"
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register "gpe0_en" = "0x40"
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