mediatek/mt8183: Add DDR driver of tx rx window perbit cal part
BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui, and inits DRAM successfully with related patches. Change-Id: I4434897864993e254e1362416316470083351493 Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Reviewed-on: https://review.coreboot.org/c/28842 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: You-Cheng Syu <youcheng@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
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@ -131,7 +131,7 @@ static void set_rank_info_to_conf(const struct sdram_params *params)
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static void set_MRR_pinmux_mapping(void)
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{
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for (u8 chn = 0; chn < CHANNEL_MAX; chn++) {
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for (size_t chn = 0; chn < CHANNEL_MAX; chn++) {
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const u8 *map = phy_mapping[chn];
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write32(&ch[chn].ao.mrr_bit_mux1,
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(map[0] << 0) | (map[1] << 8) |
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@ -27,17 +27,11 @@
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#define dramc_dbg(_x_...)
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#endif
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#define ENABLE 1
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#define DISABLE 0
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#define DATLAT_TAP_NUMBER 32
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#define MAX_CMP_CPT_WAIT_LOOP 10000
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#define TIME_OUT_CNT 100
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#define DRAMC_BROADCAST_ON 0x1f
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#define DRAMC_BROADCAST_OFF 0x0
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#define MAX_BACKUP_REG_CNT 32
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#define TX_DQ_COARSE_TUNE_TO_FINE_TUNE_TAP 64
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#define IMP_LP4X_TERM_VREF_SEL 0x1b
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#define IMP_DRVP_LP4X_UNTERM_VREF_SEL 0x1a
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@ -49,11 +43,6 @@ enum dram_te_op {
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TE_OP_READ_CHECK
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};
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enum {
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DBI_OFF = 0,
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DBI_ON
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};
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enum {
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FSP_0 = 0,
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FSP_1,
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@ -74,17 +63,6 @@ enum {
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PASS_RANGE_NA = 0x7fff
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};
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enum {
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GATING_OFF = 0,
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GATING_ON = 1
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};
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enum {
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CKE_FIXOFF = 0,
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CKE_FIXON,
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CKE_DYNAMIC
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};
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enum {
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GATING_PATTERN_NUM = 0x23,
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GATING_GOLDEND_DQSCNT = 0x4646
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@ -1145,7 +1145,7 @@ enum {
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};
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enum {
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SHU1_BX_DQ7_R_DMDQMDBI_SHU_SHIFT = 7,
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SHU1_BX_DQ7_R_DMDQMDBI_SHIFT = 7,
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SHU1_BX_DQ7_R_DMRANKRXDVS_SHIFT = 0,
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SHU1_BX_DQ7_R_DMRANKRXDVS_MASK = 0x0000000f,
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};
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@ -33,6 +33,8 @@ struct sdram_params {
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u16 delay_cell_unit;
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};
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extern const u8 phy_mapping[CHANNEL_MAX][16];
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int complex_mem_test(u8 *start, unsigned int len);
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size_t sdram_size(void);
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const struct sdram_params *get_sdram_config(void);
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@ -39,7 +39,7 @@ SECTIONS
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SRAM_END(0x00120000)
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SRAM_L2C_START(0x00200000)
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OVERLAP_DECOMPRESSOR_ROMSTAGE(0x000201000, 92K)
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OVERLAP_DECOMPRESSOR_ROMSTAGE(0x000201000, 110K)
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BOOTBLOCK(0x00227000, 89K)
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VERSTAGE(0x0023E000, 114K)
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SRAM_L2C_END(0x00280000)
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