first cut at 8601 support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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config chip.h
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object northbridge.o
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struct northbridge_via_vt8601_config
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{
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};
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extern struct chip_control northbridge_via_vt8601_control;
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#include <console/console.h>
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#include <arch/io.h>
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#include <stdint.h>
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#include <mem.h>
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#include <part/sizeram.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/hypertransport.h>
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#include <device/chip.h>
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#include <stdlib.h>
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#include <string.h>
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#include <bitops.h>
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#include "chip.h"
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#include "northbridge.h"
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struct mem_range *sizeram(void)
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{
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unsigned long mmio_basek;
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static struct mem_range mem[10];
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device_t dev;
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int i, idx;
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#warning "FIXME handle interleaved nodes"
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dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
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if (!dev) {
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printk_err("Cannot find PCI: 0:18.1\n");
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return 0;
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}
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mmio_basek = (dev_root.resource[1].base >> 10);
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/* Round mmio_basek to something the processor can support */
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mmio_basek &= ~((1 << 6) -1);
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#if 1
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#warning "FIXME improve mtrr.c so we don't use up all of the mtrrs with a 64M MMIO hole"
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/* Round the mmio hold to 256M */
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mmio_basek &= ~((256*1024) - 1);
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#endif
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#if 1
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printk_debug("mmio_base: %dKB\n", mmio_basek);
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#endif
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for(idx = i = 0; i < 8; i++) {
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uint32_t base, limit;
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unsigned basek, limitk, sizek;
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base = pci_read_config32(dev, 0x40 + (i<<3));
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limit = pci_read_config32(dev, 0x44 + (i<<3));
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if ((base & ((1<<1)|(1<<0))) != ((1<<1)|(1<<0))) {
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continue;
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}
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basek = (base & 0xffff0000) >> 2;
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limitk = ((limit + 0x00010000) & 0xffff0000) >> 2;
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sizek = limitk - basek;
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if ((idx > 0) &&
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((mem[idx -1].basek + mem[idx - 1].sizek) == basek)) {
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mem[idx -1].sizek += sizek;
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}
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else {
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mem[idx].basek = basek;
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mem[idx].sizek = sizek;
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idx++;
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}
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/* See if I need to split the region to accomodate pci memory space */
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if ((mem[idx - 1].basek <= mmio_basek) &&
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((mem[idx - 1].basek + mem[idx - 1].sizek) > mmio_basek)) {
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if (mem[idx - 1].basek < mmio_basek) {
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unsigned pre_sizek;
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pre_sizek = mmio_basek - mem[idx - 1].basek;
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mem[idx].basek = mmio_basek;
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mem[idx].sizek = mem[idx - 1].sizek - pre_sizek;
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mem[idx - 1].sizek = pre_sizek;
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idx++;
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}
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if ((mem[idx - 1].basek + mem[idx - 1].sizek) <= 4*1024*1024) {
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idx -= 1;
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}
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else {
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mem[idx - 1].basek = 4*1024*1024;
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mem[idx - 1].sizek -= (4*1024*1024 - mmio_basek);
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}
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}
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}
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#if 0
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for(i = 0; i < idx; i++) {
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printk_debug("mem[%d].basek = %08x mem[%d].sizek = %08x\n",
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i, mem[i].basek, i, mem[i].sizek);
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}
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#endif
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while(idx < sizeof(mem)/sizeof(mem[0])) {
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mem[idx].basek = 0;
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mem[idx].sizek = 0;
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idx++;
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}
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return mem;
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}
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static void enumerate(struct chip *chip)
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{
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extern struct device_operations default_pci_ops_bus;
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chip_enumerate(chip);
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chip->dev->ops = &default_pci_ops_bus;
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}
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struct chip_control northbridge_via_vt8601_control = {
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.enumerate = enumerate,
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.name = "VIA vt8601 Northbridge",
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};
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#ifndef NORTHBRIDGE_VIA_VT8601_H
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#define NORTHBRIDGE_VIA_VT8601_H
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extern unsigned int vt8601_scan_root_bus(device_t root, unsigned int max);
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#endif /* NORTHBRIDGE_VIA_VT8601_H */
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File diff suppressed because it is too large
Load Diff
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#ifndef RAMINIT_H
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#define RAMINIT_H
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#endif /* RAMINIT_H */
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