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google/lars: Enable wake from touch pad 

This patch enables GPP_B5 as ACPI_SCI for wake.
It also defines touchpad wake device in ACPI with GPE0_DW0_05 for _PRW.

BUG=none
BRANCH=none
TEST=emerge-lars coreboot

Change-Id: I2b65f6a37783ecdbdbc32ebe613243e042c865e9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ec5b629f920984564f12f2c09458ed300d031f69
Original-Change-Id: I9bd2b3595ae833fa5d07d97a7cda4a29041be837
Original-Signed-off-by: David Wu <David_Wu@quantatw.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/311890
Original-Commit-Ready: David Wu <david_wu@quantatw.com>
Original-Tested-by: David Wu <david_wu@quantatw.com>
Original-Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/12449
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
david 2015-11-10 15:00:18 +08:00 committed by Patrick Georgi
parent 3db94686e5
commit 2b7103cb0f
2 changed files with 6 additions and 1 deletions
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2
src/mainboard/google/lars/acpi/mainboard.asl
View File

@ -124,6 +124,8 @@ Scope (\_SB.PCI0.I2C1)
}
})
Name (_PRW, Package() { GPE_TOUCHPAD_WAKE, 0x3 })
Method (_STA)
{
Return (0xF)

5
src/mainboard/google/lars/gpio.h
View File

@ -38,6 +38,9 @@
/* GPP_B16 is WLAN_WAKE. GPP_B group is routed to DW0 in the GPE0 block */
#define GPE_WLAN_WAKE GPE0_DW0_16
/* GPP_B5 is TOUCHPAD WAKE. GPP_B group is routed to DW0 in the GPE0 block */
#define GPE_TOUCHPAD_WAKE GPE0_DW0_05
/* Input device interrupt configuration */
#define TOUCHPAD_INT_L GPP_B3_IRQ
#define TOUCHSCREEN_INT_L GPP_E7_IRQ
@ -79,7 +82,7 @@ static const struct pad_config gpio_table[] = {
/* HSJ_MIC_DET */ PAD_CFG_GPI(GPP_B2, NONE, DEEP),
/* TRACKPAD_INT */ PAD_CFG_GPI_APIC(GPP_B3, NONE, DEEP),
/* BT_RF_KILL */ PAD_CFG_GPO(GPP_B4, 0, DEEP),
/* SRCCLKREQ0# */ /* GPP_B5 */
/* SRCCLKREQ0# */ PAD_CFG_GPI_ACPI_SCI(GPP_B5, NONE, DEEP, YES), /* TOUCHPAD WAKE */
/* WIFI_CLK_REQ */ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1),
/* KEPLR_CLK_REQ */ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),
/* SRCCLKREQ3# */ /* GPP_B8 */