From 2b77112e66d9d1678e68b7513bc916d49230993f Mon Sep 17 00:00:00 2001
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Date: Mon, 30 Nov 2020 13:52:42 +0100
Subject: [PATCH] soc/intel/common/block/cpu/car/cache_as_ram: Add x86_64
 support

Doesn't affect x86_32.
Tested on Intel Skylake. Boots into bootblock and console is working.

Change-Id: I1b36ca8816dab9d30754aadd230c136978e3b344
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48170
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/common/block/cpu/car/cache_as_ram.S | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S
index 5af1fc65c1..167342f12e 100644
--- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S
+++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S
@@ -9,6 +9,7 @@
 #include <rules.h>
 #include <intelblocks/msr.h>
 
+.code32
 .global bootblock_pre_c_entry
 bootblock_pre_c_entry:
 
@@ -161,6 +162,15 @@ car_init_done:
 	/* Need to align stack to 16 bytes at call instruction. Account for
 	   the two pushes below. */
 	andl	$0xfffffff0, %esp
+
+#if ENV_X86_64
+	#include <cpu/x86/64bit/entry64.inc>
+	movd	%mm2, %rdi
+	shlq	$32, %rdi
+	movd	%mm1, %rsi
+	or	%rsi, %rdi
+	movd	%mm0, %rsi
+#else
 	sub	$8, %esp
 
 	/* push TSC value to stack */
@@ -168,6 +178,7 @@ car_init_done:
 	pushl	%eax	/* tsc[63:32] */
 	movd	%mm1, %eax
 	pushl	%eax	/* tsc[31:0] */
+#endif
 
 before_carstage:
 	post_code(0x2A)