From 2b83fa7741ab65bd6a77f8fcebfb5d9197eee921 Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Fri, 27 May 2022 12:27:50 -0600 Subject: [PATCH] device: Add IORESOURCE_ABOVE_4G flag to PCI64 resources When a PCI resource is marked as 64-bits, the IORESOURCE_ABOVE_4G flag needs to be passed to the v4 allocator to ensure that the resource will be allocated in a range large enough to succeed. BUG=b:214443809 TEST=agah can successfully allocate all of the Nvidia GN20 BARs Signed-off-by: Tim Wawrzynczak Change-Id: I3f16f52f2a64f8728853df263da29871dca533f7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64725 Tested-by: build bot (Jenkins) Reviewed-by: Martin L Roth --- src/device/pci_device.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 90b26c129b..fda088b020 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -423,7 +423,9 @@ static void configure_adjustable_base(const struct device *dev, res->align = max_requested_bits; res->gran = max_requested_bits; res->limit = (res->flags & IORESOURCE_PCI64) ? UINT64_MAX : UINT32_MAX; - res->flags |= IORESOURCE_PCIE_RESIZABLE_BAR; + res->flags |= (res->flags & IORESOURCE_PCI64) ? + IORESOURCE_PCIE_RESIZABLE_BAR | IORESOURCE_ABOVE_4G : + IORESOURCE_PCIE_RESIZABLE_BAR; printk(BIOS_INFO, "%s: Adjusting resource index %lu: base: %llx size: %llx " "align: %d gran: %d limit: %llx\n",