GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT 

Patch corrects IRQ and GPIO configuration for RT5682 codec's Jack INT.
Switching IOAPIC to GpioInt because ACPI Interrupt() doesn't support
jack triggering on both edges.

BUG=b:130180492
TEST=build and boot on a CML EVT board.
Use evtest & verify headset jack detection functions as expected.

Change-Id: Ia9bf8d554b54554f9ac1e78fd44a508964c8a14d
Signed-off-by: Naveen Manohar <naveen.m@intel.com>
Suggested-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32474
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Shelley Chen <shchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Naveen Manohar 2019-04-11 20:25:42 +05:30 committed by Furquan Shaikh
parent 345d202d66
commit 2b8789bb3b
3 changed files with 3 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/google/hatch/variants/baseboard/gpio.c
View File

@ -346,10 +346,8 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_G7, DN_20K),
/*
* H0 : HP_INT_L
* TODO Configure it back to invert mode, when
* ITSS IPCx configuration is fixed in FSP.
*/
PAD_CFG_GPI_APIC(GPP_H0, NONE, PLTRST, LEVEL, NONE),
PAD_CFG_GPI_INT(GPP_H0, NONE, PLTRST, LEVEL),
/* H1 : CNV_RF_RESET_L */
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF3),
/* H2 : CNV_CLKREQ0 */

2
src/mainboard/google/hatch/variants/hatch/overridetree.cb
View File

@ -132,7 +132,7 @@ chip soc/intel/cannonlake
register "hid" = ""10EC5682""
register "name" = ""RT58""
register "desc" = ""Realtek RT5682""
register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H0_IRQ)"
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_H0)"
register "property_count" = "1"
# Set the jd_src to RT5668_JD1 for jack detection
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"

2
src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb
View File

@ -117,7 +117,7 @@ chip soc/intel/cannonlake
register "hid" = ""10EC5682""
register "name" = ""RT58""
register "desc" = ""Realtek RT5682""
register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H0_IRQ)"
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_H0)"
register "property_count" = "1"
# Set the jd_src to RT5668_JD1 for jack detection
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"