tests: Add lib/spd_cache-test test case

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ic9a1420e49e1e80d180117c931e630e54c90cd75
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52938
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
This commit is contained in:
Jakub Czapiga 2021-04-22 20:14:02 +02:00 committed by Patrick Georgi
parent bfa60433cb
commit 2b8d7216ef
3 changed files with 387 additions and 0 deletions

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@ -0,0 +1,107 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <inttypes.h>
/* To generate data on Linux perform following steps:
1) Load kernel modules: i2c-i801, eeprom, ee1004
2) Find i2c number with description "SMBus I801 adapter" in `i2cdetect -l` output
3) Dump SPD (0050 and 0052 are most common addresses):
`xxd -i xxd -i /sys/bus/i2c/drivers/ee1004/0-0050/eeprom` */
unsigned char spd_data_ddr4_1[] = {
0x23, 0x10, 0x0c, 0x03, 0x45, 0x21, 0x00, 0x08, 0x00, 0x00, 0x00, 0x03, 0x0a, 0x03, 0x00, 0x00,
0x00, 0x00, 0x08, 0x0c, 0xc0, 0x3f, 0x00, 0x00, 0x70, 0x70, 0x70, 0x11, 0x03, 0x64, 0xf0, 0x0a,
0x20, 0x08, 0x00, 0x05, 0x00, 0xf0, 0x2b, 0x34, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x16, 0x36, 0x16, 0x36,
0x16, 0x36, 0x16, 0x36, 0x00, 0x00, 0x2b, 0x0c, 0x2b, 0x0c, 0x2b, 0x0c, 0x2b, 0x0c, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9c, 0xb4, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc1, 0xe2, 0x32,
0x11, 0x11, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xde, 0x27,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0xad, 0x00, 0x20, 0x14, 0x00, 0x00, 0x00, 0x34, 0x00, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x00, 0x80, 0xad,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
};
unsigned int spd_data_ddr4_1_sz = 512;
unsigned char spd_data_ddr4_2[] = {
0x23, 0x11, 0x0c, 0x02, 0x85, 0x21, 0x00, 0x08, 0x00, 0x00, 0x00, 0x03, 0x09, 0x03, 0x00, 0x00,
0x00, 0x00, 0x07, 0x0d, 0xfc, 0x2b, 0x00, 0x00, 0x6b, 0x6b, 0x6b, 0x11, 0x00, 0x6b, 0xf0, 0x0a,
0x20, 0x08, 0x00, 0x05, 0x00, 0xa8, 0x1b, 0x28, 0x28, 0x00, 0x78, 0x00, 0x14, 0x3c, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x16, 0x36, 0x16, 0x36,
0x16, 0x36, 0x16, 0x36, 0x00, 0x20, 0x2b, 0x0c, 0x2b, 0x0c, 0x2b, 0x0c, 0x2b, 0x0c, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9c, 0xb4, 0xc9, 0xc9, 0xc9, 0xc9, 0xe7, 0xd6, 0xea, 0x05,
0x11, 0x11, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xde, 0x27,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x85, 0x9b, 0x00, 0x00, 0x00, 0x39, 0x82, 0x07, 0x7b, 0x42, 0x4c, 0x53, 0x31, 0x36, 0x47, 0x34,
0x44, 0x32, 0x34, 0x30, 0x46, 0x53, 0x45, 0x2e, 0x31, 0x36, 0x46, 0x42, 0x44, 0x00, 0x80, 0x2c,
0x00, 0x44, 0x50, 0x41, 0x47, 0x48, 0x34, 0x47, 0x30, 0x30, 0x31, 0xff, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x0c, 0x4a, 0x05, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x94, 0x00, 0x00, 0x07, 0xff, 0x3f, 0x00,
0x00, 0x6a, 0x6a, 0x6a, 0x11, 0x00, 0x6b, 0xf0, 0x0a, 0x20, 0x08, 0x00, 0x05, 0x00, 0xa8, 0x1b,
0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xcf, 0xb5, 0xca, 0xca, 0xca, 0xca, 0xd6,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
};
unsigned int spd_data_ddr4_2_sz = 512;
unsigned char spd_data_ddr3_1[] = {
0x92, 0x13, 0x0b, 0x03, 0x04, 0x21, 0x02, 0x09, 0x03, 0x11, 0x01, 0x08,
0x0a, 0x00, 0xfe, 0x00, 0x69, 0x78, 0x69, 0x30, 0x69, 0x11, 0x18, 0x81,
0x20, 0x08, 0x3c, 0x3c, 0x00, 0xf0, 0x83, 0x01, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x0f, 0x11, 0x65, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xce, 0x03,
0x15, 0x01, 0x19, 0x2b, 0x89, 0x05, 0xcd, 0x0f, 0x4d, 0x34, 0x37, 0x31,
0x42, 0x31, 0x47, 0x37, 0x33, 0x51, 0x48, 0x30, 0x2d, 0x59, 0x4b, 0x30,
0x20, 0x20, 0x00, 0x00, 0x80, 0xce, 0x00, 0x00, 0x00, 0x4b, 0x30, 0x47,
0x4a, 0x30, 0x30, 0x30, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe8, 0x01, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x37, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00
};
unsigned int spd_data_ddr3_1_sz = 256;

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@ -28,6 +28,8 @@ tests-y += bootmem-test
tests-y += dimm_info_util-test tests-y += dimm_info_util-test
tests-y += coreboot_table-test tests-y += coreboot_table-test
tests-y += rtc-test tests-y += rtc-test
tests-y += spd_cache-ddr3-test
tests-y += spd_cache-ddr4-test
string-test-srcs += tests/lib/string-test.c string-test-srcs += tests/lib/string-test.c
string-test-srcs += src/lib/string.c string-test-srcs += src/lib/string.c
@ -144,3 +146,24 @@ coreboot_table-test-mocks += cbmem_top_chipset
rtc-test-srcs += tests/lib/rtc-test.c rtc-test-srcs += tests/lib/rtc-test.c
rtc-test-srcs += src/lib/rtc.c rtc-test-srcs += src/lib/rtc.c
spd_cache-ddr3-test-srcs += tests/lib/spd_cache-test.c
spd_cache-ddr3-test-srcs += tests/stubs/console.c
spd_cache-ddr3-test-srcs += src/lib/spd_cache.c
spd_cache-ddr3-test-srcs += src/lib/crc_byte.c
spd_cache-ddr3-test-srcs += src/commonlib/region.c
spd_cache-ddr3-test-mocks += fmap_locate_area_as_rdev
spd_cache-ddr3-test-config += CONFIG_SPD_CACHE_FMAP_NAME=\"RW_SPD_CACHE\" \
CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=256 \
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=1
spd_cache-ddr3-test-cflags += -D__TEST_SPD_CACHE_DDR=3
spd_cache-ddr4-test-srcs += tests/lib/spd_cache-test.c
spd_cache-ddr4-test-srcs += tests/stubs/console.c
spd_cache-ddr4-test-srcs += src/lib/spd_cache.c
spd_cache-ddr4-test-srcs += src/lib/crc_byte.c
spd_cache-ddr4-test-srcs += src/commonlib/region.c
spd_cache-ddr4-test-mocks += fmap_locate_area_as_rdev
spd_cache-ddr4-test-config += CONFIG_SPD_CACHE_FMAP_NAME=\"RW_SPD_CACHE\" \
CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=512 \
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=1
spd_cache-ddr4-test-cflags += -D__TEST_SPD_CACHE_DDR=4

257
tests/lib/spd_cache-test.c Normal file
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@ -0,0 +1,257 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <crc_byte.h>
#include <spd_bin.h>
#include <spd_cache.h>
#include <stdlib.h>
#include <string.h>
#include <tests/test.h>
#include <tests/lib/spd_cache_data.h>
struct region_device flash_rdev_rw;
static char *flash_buffer = NULL;
static size_t flash_buffer_size = 0;
static int setup_spd_cache(void **state)
{
flash_buffer_size = SC_SPD_TOTAL_LEN + SC_CRC_LEN;
flash_buffer = malloc(flash_buffer_size);
if (flash_buffer == NULL) {
flash_buffer_size = 0;
return -1;
}
rdev_chain_mem_rw(&flash_rdev_rw, flash_buffer, flash_buffer_size);
return 0;
}
static int setup_spd_cache_test(void **state)
{
memset(flash_buffer, 0xff, flash_buffer_size);
return 0;
}
static int teardown_spd_cache(void **state)
{
rdev_chain_mem_rw(&flash_rdev_rw, NULL, 0);
free(flash_buffer);
flash_buffer = NULL;
flash_buffer_size = 0;
return 0;
}
int __wrap_fmap_locate_area_as_rdev(const char *name, struct region_device *area)
{
return rdev_chain(area, &flash_rdev_rw, 0, flash_buffer_size);
}
/* This test verifies if load_spd_cache() correctly loads spd_cache pointer and size
from provided region_device. Memory region device is returned by
__wrap_fmap_locate_area_as_rdev() */
static void test_load_spd_cache(void **state)
{
uint8_t *spd_cache;
size_t spd_cache_sz;
assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz));
assert_ptr_equal(flash_buffer, spd_cache);
assert_int_equal(SC_SPD_TOTAL_LEN + SC_CRC_LEN, spd_cache_sz);
}
static void calc_spd_cache_crc(uint8_t *spd_cache)
{
*(uint16_t *)(spd_cache + SC_CRC_OFFSET) =
CRC(spd_cache, SC_SPD_TOTAL_LEN, crc16_byte);
}
__attribute__((unused))
static void fill_spd_cache_ddr3(uint8_t *spd_cache, size_t spd_cache_sz)
{
assert_true(spd_cache_sz >= (spd_data_ddr3_1_sz + sizeof(uint16_t)));
memcpy(spd_cache, spd_data_ddr3_1, spd_data_ddr3_1_sz);
memset(spd_cache + spd_data_ddr3_1_sz, 0, spd_cache_sz - spd_data_ddr3_1_sz);
calc_spd_cache_crc(spd_cache);
}
__attribute__((unused))
static void fill_spd_cache_ddr4(uint8_t *spd_cache, size_t spd_cache_sz)
{
assert_true(spd_cache_sz >=
(spd_data_ddr4_1_sz + spd_data_ddr4_2_sz + sizeof(uint16_t)));
memcpy(spd_cache, spd_data_ddr4_1, spd_data_ddr4_1_sz);
memcpy(spd_cache + spd_data_ddr4_1_sz, spd_data_ddr4_2, spd_data_ddr4_2_sz);
memset(spd_cache + spd_data_ddr4_1_sz + spd_data_ddr4_2_sz, 0,
spd_cache_sz - (spd_data_ddr4_1_sz + spd_data_ddr4_2_sz));
calc_spd_cache_crc(spd_cache);
}
static void test_spd_fill_from_cache(void **state)
{
struct spd_block blk;
uint8_t *spd_cache;
size_t spd_cache_sz;
assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz));
/* Empty spd cache */
assert_int_equal(CB_ERR, spd_fill_from_cache(spd_cache, &blk));
#if __TEST_SPD_CACHE_DDR == 3
fill_spd_cache_ddr3(spd_cache, spd_cache_sz);
#elif __TEST_SPD_CACHE_DDR == 4
fill_spd_cache_ddr4(spd_cache, spd_cache_sz);
#endif
assert_int_equal(CB_SUCCESS, spd_fill_from_cache(spd_cache, &blk));
}
static void test_spd_cache_is_valid(void **state)
{
uint8_t *spd_cache;
size_t spd_cache_sz;
assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz));
/* Empty, incorrect SPD */
assert_false(spd_cache_is_valid(spd_cache, spd_cache_sz));
#if __TEST_SPD_CACHE_DDR == 3
fill_spd_cache_ddr3(spd_cache, spd_cache_sz);
#elif __TEST_SPD_CACHE_DDR == 4
fill_spd_cache_ddr4(spd_cache, spd_cache_sz);
#endif
assert_true(spd_cache_is_valid(spd_cache, spd_cache_sz));
}
/* Used for setting `sn` parameter value */
static u32 get_spd_sn_ret_sn[SC_SPD_NUMS] = { 0 };
static size_t get_spd_sn_ret_sn_idx = 0;
/* Implementation for testing purposes. */
enum cb_err get_spd_sn(u8 addr, u32 *sn)
{
*sn = get_spd_sn_ret_sn[get_spd_sn_ret_sn_idx];
get_spd_sn_ret_sn_idx = (get_spd_sn_ret_sn_idx + 1) % ARRAY_SIZE(get_spd_sn_ret_sn);
return mock_type(enum cb_err);
}
static void get_sn_from_spd_cache(uint8_t *spd_cache, u32 arr[])
{
for (int i = 0; i < SC_SPD_NUMS; ++i)
arr[i] = *(u32 *)(spd_cache + SC_SPD_OFFSET(i) + DDR4_SPD_SN_OFF);
}
/* check_if_dimm_changed() has is used only with DDR4, so there tests are not used for DDR3 */
__attribute__((unused))
static void test_check_if_dimm_changed_not_changed(void **state)
{
uint8_t *spd_cache;
size_t spd_cache_sz;
struct spd_block blk;
assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz));
fill_spd_cache_ddr4(spd_cache, spd_cache_sz);
assert_int_equal(CB_SUCCESS, spd_fill_from_cache(spd_cache, &blk));
get_sn_from_spd_cache(spd_cache, get_spd_sn_ret_sn);
get_spd_sn_ret_sn_idx = 0;
will_return_count(get_spd_sn, CB_SUCCESS, SC_SPD_NUMS);
assert_false(check_if_dimm_changed(spd_cache, &blk));
}
__attribute__((unused))
static void test_check_if_dimm_changed_sn_error(void **state)
{
uint8_t *spd_cache;
size_t spd_cache_sz;
struct spd_block blk;
assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz));
fill_spd_cache_ddr4(spd_cache, spd_cache_sz);
assert_int_equal(CB_SUCCESS, spd_fill_from_cache(spd_cache, &blk));
/* Simulate error */
will_return_count(get_spd_sn, CB_ERR, 1);
assert_true(check_if_dimm_changed(spd_cache, &blk));
}
__attribute__((unused))
static void test_check_if_dimm_changed_sodimm_lost(void **state)
{
uint8_t *spd_cache;
size_t spd_cache_sz;
struct spd_block blk;
assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz));
fill_spd_cache_ddr4(spd_cache, spd_cache_sz);
assert_int_equal(CB_SUCCESS, spd_fill_from_cache(spd_cache, &blk));
get_sn_from_spd_cache(spd_cache, get_spd_sn_ret_sn);
memset(spd_cache + spd_data_ddr4_1_sz, 0xff, spd_data_ddr4_2_sz);
get_spd_sn_ret_sn_idx = 0;
will_return_always(get_spd_sn, CB_SUCCESS);
assert_true(check_if_dimm_changed(spd_cache, &blk));
}
__attribute__((unused))
static void test_check_if_dimm_changed_new_sodimm(void **state)
{
uint8_t *spd_cache;
size_t spd_cache_sz;
struct spd_block blk;
assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz));
fill_spd_cache_ddr4(spd_cache, spd_cache_sz);
assert_int_equal(CB_SUCCESS, spd_fill_from_cache(spd_cache, &blk));
get_sn_from_spd_cache(spd_cache, get_spd_sn_ret_sn);
memcpy(spd_cache + spd_data_ddr4_1_sz + spd_data_ddr4_2_sz,
spd_data_ddr4_2, spd_data_ddr4_2_sz);
get_spd_sn_ret_sn_idx = 0;
will_return_always(get_spd_sn, CB_SUCCESS);
assert_true(check_if_dimm_changed(spd_cache, &blk));
}
__attribute__((unused))
static void test_check_if_dimm_changed_sn_changed(void **state)
{
uint8_t *spd_cache;
size_t spd_cache_sz;
struct spd_block blk;
assert_int_equal(CB_SUCCESS, load_spd_cache(&spd_cache, &spd_cache_sz));
fill_spd_cache_ddr4(spd_cache, spd_cache_sz);
assert_int_equal(CB_SUCCESS, spd_fill_from_cache(spd_cache, &blk));
get_sn_from_spd_cache(spd_cache, get_spd_sn_ret_sn);
*(u32 *)(spd_cache + SC_SPD_OFFSET(0) + DDR4_SPD_SN_OFF) = 0x43211234;
get_spd_sn_ret_sn_idx = 0;
will_return_always(get_spd_sn, CB_SUCCESS);
assert_true(check_if_dimm_changed(spd_cache, &blk));
}
int main(void)
{
const struct CMUnitTest tests[] = {
cmocka_unit_test_setup(test_load_spd_cache, setup_spd_cache_test),
cmocka_unit_test_setup(test_spd_fill_from_cache, setup_spd_cache_test),
cmocka_unit_test_setup(test_spd_cache_is_valid, setup_spd_cache_test),
#if __TEST_SPD_CACHE_DDR == 4
cmocka_unit_test_setup(test_check_if_dimm_changed_not_changed,
setup_spd_cache_test),
cmocka_unit_test_setup(test_check_if_dimm_changed_sn_error,
setup_spd_cache_test),
cmocka_unit_test_setup(test_check_if_dimm_changed_sodimm_lost,
setup_spd_cache_test),
cmocka_unit_test_setup(test_check_if_dimm_changed_new_sodimm,
setup_spd_cache_test),
cmocka_unit_test_setup(test_check_if_dimm_changed_sn_changed,
setup_spd_cache_test),
#endif
};
return cmocka_run_group_tests(tests, setup_spd_cache, teardown_spd_cache);
}