soc/intel/apollolake: Fix northbridge _crs scope
Move _CRS scope from MCHC device only to whole pci root bus. Otherwise ACPI will not able to assign resource to devices other than MCHC. Change-Id: Iaa294c63e03a4fc6644f1be5d69ab3de077e6cc3 Signed-off-by: Zhao, Lijian <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/14477 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Zhao, Lijian
Aaron Durbin
parent
cbf1a0fec8
commit
2b9a5f5688
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@ -36,97 +36,98 @@ Device (MCHC)
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Offset(0xBC),
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TLUD, 32, /* Top of Low Useable DRAM */
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}
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Name (MCRS, ResourceTemplate()
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{
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/* Bus Numbers */
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WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
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0x0000, 0x0000, 0x00ff, 0x0000, 0x0100,,,)
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/* IO Region 0 */
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DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
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0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8,,,)
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/* PCI Config Space */
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Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
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/* IO Region 1 */
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DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
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0x0000, 0x01000, 0xffff, 0x0000, 0xf000,,,)
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/* VGA memory (0xa0000-0xbffff) */
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DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
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0x00020000,,,)
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/* Data and GFX stolen memory */
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DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x3be00000, 0x3fffffff, 0x00000000,
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0x04200000,,, STOM)
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/*
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* PCI MMIO Region (TOLUD - PCI extended base MMCONF)
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* This assumes that MMCONF is placed after PCI config space,
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* and that no resources are allocated after the MMCONF region.
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* This works, sicne MMCONF is hardcoded to 0xe00000000.
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*/
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DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
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NonCacheable, ReadWrite,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000,,, PM01)
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/* PCI Memory Region (TOUUD - (TOUUD + ABOVE_4G_MMIO_SIZE)) */
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QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
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NonCacheable, ReadWrite,
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0x00000000, 0x10000, 0x1ffff, 0x00000000,
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0x10000,,, PM02)
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})
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/* Current Resource Settings */
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Method (_CRS, 0, Serialized)
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{
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/* Find PCI resource area in MCRS */
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CreateDwordField (MCRS, ^PM01._MIN, PMIN)
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CreateDwordField (MCRS, ^PM01._MAX, PMAX)
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CreateDwordField (MCRS, ^PM01._LEN, PLEN)
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/* Read C-Unit PCI CFG Reg. 0xBC for TOLUD (shadow from B-Unit) */
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And(^TLUD, 0xFFF00000, PMIN)
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/* Read MMCONF base */
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And(^MCNF, 0xF0000000, PMAX)
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/* Calculate PCI MMIO Length */
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Add(Subtract(PMAX, PMIN), 1, PLEN)
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/* Find GFX resource area in GCRS */
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CreateDwordField(MCRS, ^STOM._MIN, GMIN)
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CreateDwordField(MCRS, ^STOM._MAX, GMAX)
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CreateDwordField(MCRS, ^STOM._LEN, GLEN)
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/* Read BGSM */
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And(^BGSM, 0xFFF00000, GMIN)
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/* Read TOLUD */
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And(^TLUD, 0xFFF00000, GMAX)
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Decrement(GMAX)
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Add(Subtract(GMAX, GMIN), 1, GLEN)
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/* Patch PM02 range based on Memory Size */
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CreateQwordField (MCRS, ^PM02._MIN, MMIN)
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CreateQwordField (MCRS, ^PM02._MAX, MMAX)
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CreateQwordField (MCRS, ^PM02._LEN, MLEN)
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Store (^TUUD, Local0)
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If (LLessEqual (Local0, 0x1000000000))
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{
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Store (0, MMIN)
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Store (0, MLEN)
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}
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Subtract (Add (MMIN, MLEN), 1, MMAX)
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Return (MCRS)
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}
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}
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Name (MCRS, ResourceTemplate()
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{
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/* Bus Numbers */
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WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
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0x0000, 0x0000, 0x00ff, 0x0000, 0x0100,,,)
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/* IO Region 0 */
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DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
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0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8,,,)
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/* PCI Config Space */
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Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
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/* IO Region 1 */
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DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
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0x0000, 0x01000, 0xffff, 0x0000, 0xf000,,,)
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/* VGA memory (0xa0000-0xbffff) */
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DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
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0x00020000,,,)
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/* Data and GFX stolen memory */
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DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x3be00000, 0x3fffffff, 0x00000000,
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0x04200000,,, STOM)
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/*
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* PCI MMIO Region (TOLUD - PCI extended base MMCONF)
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* This assumes that MMCONF is placed after PCI config space,
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* and that no resources are allocated after the MMCONF region.
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* This works, sicne MMCONF is hardcoded to 0xe00000000.
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*/
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DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
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NonCacheable, ReadWrite,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000,,, PM01)
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/* PCI Memory Region (TOUUD - (TOUUD + ABOVE_4G_MMIO_SIZE)) */
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QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
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NonCacheable, ReadWrite,
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0x00000000, 0x10000, 0x1ffff, 0x00000000,
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0x10000,,, PM02)
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})
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/* Current Resource Settings */
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Method (_CRS, 0, Serialized)
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{
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/* Find PCI resource area in MCRS */
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CreateDwordField (MCRS, ^PM01._MIN, PMIN)
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CreateDwordField (MCRS, ^PM01._MAX, PMAX)
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CreateDwordField (MCRS, ^PM01._LEN, PLEN)
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/* Read C-Unit PCI CFG Reg. 0xBC for TOLUD (shadow from B-Unit) */
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And(^MCHC.TLUD, 0xFFF00000, PMIN)
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/* Read MMCONF base */
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And(^MCHC.MCNF, 0xF0000000, PMAX)
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/* Calculate PCI MMIO Length */
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Add(Subtract(PMAX, PMIN), 1, PLEN)
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/* Find GFX resource area in GCRS */
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CreateDwordField(MCRS, ^STOM._MIN, GMIN)
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CreateDwordField(MCRS, ^STOM._MAX, GMAX)
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CreateDwordField(MCRS, ^STOM._LEN, GLEN)
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/* Read BGSM */
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And(^MCHC.BGSM, 0xFFF00000, GMIN)
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/* Read TOLUD */
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And(^MCHC.TLUD, 0xFFF00000, GMAX)
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Decrement(GMAX)
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Add(Subtract(GMAX, GMIN), 1, GLEN)
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/* Patch PM02 range based on Memory Size */
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CreateQwordField (MCRS, ^PM02._MIN, MMIN)
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CreateQwordField (MCRS, ^PM02._MAX, MMAX)
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CreateQwordField (MCRS, ^PM02._LEN, MLEN)
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Store (^MCHC.TUUD, Local0)
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If (LLessEqual (Local0, 0x1000000000))
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{
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Store (0, MMIN)
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Store (0, MLEN)
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}
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Subtract (Add (MMIN, MLEN), 1, MMAX)
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Return (MCRS)
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}
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