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mb/starlabs/lite/{glk/glkr}: Disable PMC PCI device 

The PMC is accessed via sideband registers, so the PCI device is not
needed.

Disabling it solves a bug where the laptop cannot be powered on
without the charger connected.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I78f4aa4567dfc154ef5cb21f8746265259cd53e0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64451
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2022-05-18 09:20:07 +01:00 committed by Martin L Roth
parent 0ef8ad2ea5
commit 2bbb6f3064
2 changed files with 2 additions and 2 deletions
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2
src/mainboard/starlabs/lite/variants/glk/devicetree.cb
View File

@ -68,7 +68,7 @@ chip soc/intel/apollolake
end end
end end
device pci 0d.0 off end # P2SB device pci 0d.0 off end # P2SB
device pci 0d.1 on end # PMC device pci 0d.1 off end # PMC
device pci 0d.2 on end # SPI device pci 0d.2 on end # SPI
device pci 0d.3 off end # Shared SRAM device pci 0d.3 off end # Shared SRAM
device pci 0e.0 on end # Audio device pci 0e.0 on end # Audio

2
src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
View File

@ -66,7 +66,7 @@ chip soc/intel/apollolake
end end
end end
device pci 0d.0 off end # P2SB device pci 0d.0 off end # P2SB
device pci 0d.1 on end # PMC device pci 0d.1 off end # PMC
device pci 0d.2 on end # SPI device pci 0d.2 on end # SPI
device pci 0d.3 off end # Shared SRAM device pci 0d.3 off end # Shared SRAM
device pci 0e.0 on end # Audio device pci 0e.0 on end # Audio