mb/*/*/devicetree.cb: Move the ioapic device under the LPC bridge
This fixes spurious lines "child IOAPIC: 02 not a PCI device" and IOAPIC as leftover device. Change-Id: Id8010c84c45f0859508e7564c0eaa501904b7043 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/31041 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -76,14 +76,6 @@ chip northbridge/intel/gm45
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register "pcie_power_limits" = "{ { 10, 0 }, { 10, 0 }, { 0, 0 }, { 10, 0 }, { 0, 0 }, { 0, 0 } }"
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register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
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chip drivers/generic/ioapic
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register "have_isa_interrupts" = "1"
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register "irq_on_fsb" = "1"
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register "enable_virtual_wire" = "1"
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register "base" = "(void *)0xfec00000"
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device ioapic 2 on end
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end
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device pci 19.0 on end # LAN
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device pci 1a.0 on # UHCI
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subsystemid 0x17aa 0x20f0
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@ -141,6 +133,15 @@ chip northbridge/intel/gm45
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end
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device pci 1f.0 on # LPC bridge
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subsystemid 0x17aa 0x20f5
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chip drivers/generic/ioapic
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register "have_isa_interrupts" = "1"
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register "irq_on_fsb" = "1"
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register "enable_virtual_wire" = "1"
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register "base" = "(void *)0xfec00000"
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device ioapic 2 on end
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end
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chip ec/lenovo/pmh7
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device pnp ff.1 on # dummy
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end
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@ -80,14 +80,6 @@ chip northbridge/intel/gm45
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register "pcie_power_limits" = "{ { 10, 0 }, { 10, 0 }, { 0, 0 }, { 10, 0 }, { 0, 0 }, { 0, 0 } }"
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register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
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chip drivers/generic/ioapic
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register "have_isa_interrupts" = "1"
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register "irq_on_fsb" = "1"
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register "enable_virtual_wire" = "1"
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register "base" = "(void *)0xfec00000"
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device ioapic 2 on end
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end
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device pci 19.0 on end # LAN
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device pci 1a.0 on # UHCI
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subsystemid 0x17aa 0x20f0
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@ -145,6 +137,15 @@ chip northbridge/intel/gm45
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end
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device pci 1f.0 on # LPC bridge
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subsystemid 0x17aa 0x20f5
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chip drivers/generic/ioapic
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register "have_isa_interrupts" = "1"
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register "irq_on_fsb" = "1"
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register "enable_virtual_wire" = "1"
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register "base" = "(void *)0xfec00000"
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device ioapic 2 on end
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end
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chip ec/lenovo/pmh7
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device pnp ff.1 on # dummy
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end
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@ -67,14 +67,6 @@ chip northbridge/intel/gm45
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# Maybe we should set less for Mini PCIe.
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register "pcie_power_limits" = "{ { 10, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 10, 0 }, { 0, 0 } }"
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chip drivers/generic/ioapic
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register "have_isa_interrupts" = "1"
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register "irq_on_fsb" = "1"
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register "enable_virtual_wire" = "1"
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register "base" = "(void *)0xfec00000"
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device ioapic 2 on end
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end
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device pci 19.0 off end # LAN
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device pci 1a.0 on # UHCI
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ioapic_irq 2 INTA 0x10
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@ -126,6 +118,14 @@ chip northbridge/intel/gm45
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device pci 03.4 off end # unconnected SD-Card
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end
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device pci 1f.0 on # LPC bridge
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chip drivers/generic/ioapic
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register "have_isa_interrupts" = "1"
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register "irq_on_fsb" = "1"
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register "enable_virtual_wire" = "1"
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register "base" = "(void *)0xfec00000"
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device ioapic 2 on end
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end
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chip superio/smsc/lpc47n227
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device pnp 2e.1 on # Parallel port
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io 0x60 = 0x378
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