soc/intel/common: Add IOE SBI access for TCSS functions
Meteor Lake has the IOE Die for TCSS. This change adds IOE SBI access for TCSS pad configuration and Thunderbolt authentication. BUG=b:213574324 TEST=Build platforms coreboot images successfully. Change-Id: I324242a018fb47207dd426fc8acd103f677d5cab Signed-off-by: John Zhao <john.zhao@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63128 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
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@ -146,6 +146,7 @@ extern const struct soc_tcss_ops tcss_ops;
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/* Method to configure pads */
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void tcss_configure_aux_bias_pads_regbar(const struct typec_aux_bias_pads *pads);
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void ioe_tcss_configure_aux_bias_pads_sbi(const struct typec_aux_bias_pads *pads);
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/*
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* 1) Initialize TCSS muxes to disconnected state
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@ -163,5 +164,6 @@ const struct tcss_port_map *tcss_get_port_info(size_t *num_ports);
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/* Method to validate the Thunderbolt authentication */
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bool tcss_valid_tbt_auth(void);
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bool ioe_tcss_valid_tbt_auth(void);
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#endif /* _TCSS_H_ */
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@ -368,6 +368,19 @@ void tcss_configure_aux_bias_pads_regbar(
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}
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}
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void ioe_tcss_configure_aux_bias_pads_sbi(
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const struct typec_aux_bias_pads *pads)
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{
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for (size_t i = 0; i < MAX_TYPE_C_PORTS; i++) {
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if (pads[i].pad_auxn_dc && pads[i].pad_auxp_dc) {
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ioe_p2sb_sbi_write(PID_IOM, IOM_AUX_BIAS_CTRL_PULLUP_OFFSET(i),
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calc_bias_ctrl_reg_value(pads[i].pad_auxp_dc));
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ioe_p2sb_sbi_write(PID_IOM, IOM_AUX_BIAS_CTRL_PULLDOWN_OFFSET(i),
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calc_bias_ctrl_reg_value(pads[i].pad_auxn_dc));
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}
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}
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}
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const struct tcss_port_map *tcss_get_port_info(size_t *num_ports)
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{
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static struct tcss_port_map port_map[MAX_TYPE_C_PORTS];
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@ -424,3 +437,8 @@ bool tcss_valid_tbt_auth(void)
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{
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return REGBAR32(PID_IOM, IOM_CSME_IMR_TBT_STATUS) & TBT_VALID_AUTHENTICATION;
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}
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bool ioe_tcss_valid_tbt_auth(void)
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{
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return ioe_p2sb_sbi_read(PID_IOM, IOM_CSME_IMR_TBT_STATUS) & TBT_VALID_AUTHENTICATION;
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}
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