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google/snappy: enhance CCD type-A USB 2.0 phy strength 

Alan(11")/BigDaddy(14") right type-A(port#2), CCD(port#4) are
occasionally undetectable. USB 2.0 phy needs an override to enhance
drive strength.

right type-A port#2
PERPORTPETXISET: 4
PERPORTTXISET: 4
IUSBTXEMPHASISEN: 1
PERPORTTXPEHALF: 0

CCD port#4
PERPORTPETXISET: 7
PERPORTTXISET: 7
IUSBTXEMPHASISEN: 1
PERPORTTXPEHALF: 0

BUG=b:72922816
BRANCH=reef
TEST=emerge-snappy coreboot
Change-Id: I2b18c11709280d00ec3a6ef10f93a416acb4fb45
Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/24969
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kevin Chiu 2018-03-02 11:51:28 +08:00 committed by Aaron Durbin
parent d182b63347
commit 2be3bdd748
1 changed files with 21 additions and 0 deletions
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21
src/mainboard/google/reef/variants/snappy/mainboard.c
View File

@ -89,12 +89,33 @@ void mainboard_devtree_update(struct device *dev)
sku_id = variant_board_sku(); sku_id = variant_board_sku();
switch (sku_id) { switch (sku_id) {
case SKU_ALAN:
cfg->usb2eye[2].Usb20PerPortPeTxiSet = 4;
cfg->usb2eye[2].Usb20PerPortTxiSet = 4;
cfg->usb2eye[2].Usb20IUsbTxEmphasisEn = 1;
cfg->usb2eye[2].Usb20PerPortTxPeHalf = 0;
cfg->usb2eye[4].Usb20PerPortPeTxiSet = 7;
cfg->usb2eye[4].Usb20PerPortTxiSet = 7;
cfg->usb2eye[4].Usb20IUsbTxEmphasisEn = 1;
cfg->usb2eye[4].Usb20PerPortTxPeHalf = 0;
break;
case SKU_BIGDADDY_KBDBKLIGHT: case SKU_BIGDADDY_KBDBKLIGHT:
case SKU_BIGDADDY: case SKU_BIGDADDY:
cfg->usb2eye[1].Usb20PerPortPeTxiSet = 7; cfg->usb2eye[1].Usb20PerPortPeTxiSet = 7;
cfg->usb2eye[1].Usb20PerPortTxiSet = 1; cfg->usb2eye[1].Usb20PerPortTxiSet = 1;
cfg->usb2eye[1].Usb20IUsbTxEmphasisEn = 3; cfg->usb2eye[1].Usb20IUsbTxEmphasisEn = 3;
cfg->usb2eye[1].Usb20PerPortTxPeHalf = 0; cfg->usb2eye[1].Usb20PerPortTxPeHalf = 0;
cfg->usb2eye[2].Usb20PerPortPeTxiSet = 4;
cfg->usb2eye[2].Usb20PerPortTxiSet = 4;
cfg->usb2eye[2].Usb20IUsbTxEmphasisEn = 1;
cfg->usb2eye[2].Usb20PerPortTxPeHalf = 0;
cfg->usb2eye[4].Usb20PerPortPeTxiSet = 7;
cfg->usb2eye[4].Usb20PerPortTxiSet = 7;
cfg->usb2eye[4].Usb20IUsbTxEmphasisEn = 1;
cfg->usb2eye[4].Usb20PerPortTxPeHalf = 0;
break; break;
default: default:
break; break;