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nb/intel/sandybridge: Truncate IOSAV subseq gaps 

We set bit 15 of IOSAV_n_SUBSEQ_CTRL three times, but it is reserved.
Since this bitfield is five bits wide, manually truncate the values so
that bit 15 does not get set.

Tested on Asus P8Z77-V LX2, still boots.

Change-Id: Ib61b026b016b0d22e164f8817158ec5093f6bb9e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40981
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Angel Pons 2020-05-02 22:15:03 +02:00
parent e7afcd5391
commit 2be5900087
1 changed files with 3 additions and 3 deletions
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6
src/northbridge/intel/sandybridge/raminit_common.c
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@ -854,7 +854,7 @@ void dram_mrscommands(ramctr_timing *ctrl)
/* DRAM command ZQCS */ /* DRAM command ZQCS */
IOSAV_SUBSEQUENCE(channel, 0, IOSAV_SUBSEQUENCE(channel, 0,
IOSAV_ZQCS, 0, IOSAV_ZQCS, 0,
1, 36, 101, SSQ_NA, 1, 4, 101, SSQ_NA,
0, 6, 0, slotrank, 0, 6, 0, slotrank,
0, 0, 0, 0, 31, 0, 0, 0); 0, 0, 0, 0, 31, 0, 0, 0);
@ -1976,7 +1976,7 @@ int write_training(ramctr_timing *ctrl)
/* DRAM command ZQCS */ /* DRAM command ZQCS */
IOSAV_SUBSEQUENCE(channel, 0, IOSAV_SUBSEQUENCE(channel, 0,
IOSAV_ZQCS, 0, IOSAV_ZQCS, 0,
1, 36, 101, SSQ_NA, 1, 4, 101, SSQ_NA,
0, 6, 0, 0, 0, 6, 0, 0,
0, 0, 0, 0, 31, 0, 0, 0); 0, 0, 0, 0, 31, 0, 0, 0);
@ -2935,7 +2935,7 @@ int channel_test(ramctr_timing *ctrl)
/* DRAM command ACT */ /* DRAM command ACT */
IOSAV_SUBSEQUENCE(channel, 0, IOSAV_SUBSEQUENCE(channel, 0,
IOSAV_ACT, 1, IOSAV_ACT, 1,
4, 40, 40, SSQ_NA, 4, 8, 40, SSQ_NA,
0, 6, 0, slotrank, 0, 6, 0, slotrank,
0, 0, 1, 0, 18, 0, 0, 0); 0, 0, 1, 0, 18, 0, 0, 0);