mb/google/poppy/variants/nocturne: Update DPTF settings
Update DPTF settings based on recommendation from thermal team. BUG=b:112550414 BRANCH=None TEST=Manually tested by thermal team. Change-Id: I26f09392a3293ce4b3481f2be341a667d606bc10 Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org> Reviewed-on: https://review.coreboot.org/28666 Reviewed-by: Todd Broch <tbroch@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
7e56626b0a
commit
2beadeec35
|
@ -14,28 +14,28 @@
|
||||||
* GNU General Public License for more details.
|
* GNU General Public License for more details.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define DPTF_CPU_PASSIVE 80
|
#define DPTF_CPU_PASSIVE 70
|
||||||
#define DPTF_CPU_CRITICAL 105
|
#define DPTF_CPU_CRITICAL 100
|
||||||
|
|
||||||
#define DPTF_TSR0_SENSOR_ID 1
|
#define DPTF_TSR0_SENSOR_ID 1
|
||||||
#define DPTF_TSR0_SENSOR_NAME "Ambient"
|
#define DPTF_TSR0_SENSOR_NAME "Ambient"
|
||||||
#define DPTF_TSR0_PASSIVE 48
|
#define DPTF_TSR0_PASSIVE 50
|
||||||
#define DPTF_TSR0_CRITICAL 90
|
#define DPTF_TSR0_CRITICAL 55
|
||||||
|
|
||||||
#define DPTF_TSR1_SENSOR_ID 2
|
#define DPTF_TSR1_SENSOR_ID 2
|
||||||
#define DPTF_TSR1_SENSOR_NAME "Charger"
|
#define DPTF_TSR1_SENSOR_NAME "Charger"
|
||||||
#define DPTF_TSR1_PASSIVE 48
|
#define DPTF_TSR1_PASSIVE 55
|
||||||
#define DPTF_TSR1_CRITICAL 90
|
#define DPTF_TSR1_CRITICAL 65
|
||||||
|
|
||||||
#define DPTF_TSR2_SENSOR_ID 3
|
#define DPTF_TSR2_SENSOR_ID 3
|
||||||
#define DPTF_TSR2_SENSOR_NAME "DRAM"
|
#define DPTF_TSR2_SENSOR_NAME "DRAM"
|
||||||
#define DPTF_TSR2_PASSIVE 65
|
#define DPTF_TSR2_PASSIVE 45
|
||||||
#define DPTF_TSR2_CRITICAL 75
|
#define DPTF_TSR2_CRITICAL 48
|
||||||
|
|
||||||
#define DPTF_TSR3_SENSOR_ID 4
|
#define DPTF_TSR3_SENSOR_ID 4
|
||||||
#define DPTF_TSR3_SENSOR_NAME "eMMC"
|
#define DPTF_TSR3_SENSOR_NAME "eMMC"
|
||||||
#define DPTF_TSR3_PASSIVE 65
|
#define DPTF_TSR3_PASSIVE 48
|
||||||
#define DPTF_TSR3_CRITICAL 75
|
#define DPTF_TSR3_CRITICAL 53
|
||||||
|
|
||||||
#undef DPTF_ENABLE_FAN_CONTROL
|
#undef DPTF_ENABLE_FAN_CONTROL
|
||||||
#define DPTF_ENABLE_CHARGER
|
#define DPTF_ENABLE_CHARGER
|
||||||
|
@ -64,6 +64,9 @@ Name (DTRT, Package () {
|
||||||
#ifdef DPTF_ENABLE_CHARGER
|
#ifdef DPTF_ENABLE_CHARGER
|
||||||
/* Charger Throttle Effect on Charger (TSR1) */
|
/* Charger Throttle Effect on Charger (TSR1) */
|
||||||
Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 },
|
Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 },
|
||||||
|
|
||||||
|
/* Charger Throttle Effect on DRAM (TSR2) */
|
||||||
|
Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 },
|
||||||
#endif
|
#endif
|
||||||
})
|
})
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue