mb/google/poppy/variants/nocturne: Update DPTF settings
Update DPTF settings based on recommendation from thermal team. BUG=b:112550414 BRANCH=None TEST=Manually tested by thermal team. Change-Id: I26f09392a3293ce4b3481f2be341a667d606bc10 Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org> Reviewed-on: https://review.coreboot.org/28666 Reviewed-by: Todd Broch <tbroch@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -14,28 +14,28 @@
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* GNU General Public License for more details.
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*/
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#define DPTF_CPU_PASSIVE 80
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#define DPTF_CPU_CRITICAL 105
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#define DPTF_CPU_PASSIVE 70
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#define DPTF_CPU_CRITICAL 100
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#define DPTF_TSR0_SENSOR_ID 1
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#define DPTF_TSR0_SENSOR_NAME "Ambient"
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#define DPTF_TSR0_PASSIVE 48
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#define DPTF_TSR0_CRITICAL 90
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#define DPTF_TSR0_PASSIVE 50
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#define DPTF_TSR0_CRITICAL 55
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#define DPTF_TSR1_SENSOR_ID 2
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#define DPTF_TSR1_SENSOR_NAME "Charger"
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#define DPTF_TSR1_PASSIVE 48
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#define DPTF_TSR1_CRITICAL 90
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#define DPTF_TSR1_PASSIVE 55
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#define DPTF_TSR1_CRITICAL 65
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#define DPTF_TSR2_SENSOR_ID 3
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#define DPTF_TSR2_SENSOR_NAME "DRAM"
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#define DPTF_TSR2_PASSIVE 65
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#define DPTF_TSR2_CRITICAL 75
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#define DPTF_TSR2_PASSIVE 45
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#define DPTF_TSR2_CRITICAL 48
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#define DPTF_TSR3_SENSOR_ID 4
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#define DPTF_TSR3_SENSOR_NAME "eMMC"
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#define DPTF_TSR3_PASSIVE 65
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#define DPTF_TSR3_CRITICAL 75
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#define DPTF_TSR3_PASSIVE 48
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#define DPTF_TSR3_CRITICAL 53
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#undef DPTF_ENABLE_FAN_CONTROL
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#define DPTF_ENABLE_CHARGER
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@ -64,6 +64,9 @@ Name (DTRT, Package () {
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#ifdef DPTF_ENABLE_CHARGER
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/* Charger Throttle Effect on Charger (TSR1) */
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Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 },
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/* Charger Throttle Effect on DRAM (TSR2) */
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Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 },
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#endif
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})
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