diff --git a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
index a36c849779..466f08a21f 100644
--- a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
@@ -17,6 +17,8 @@ chip soc/intel/alderlake
 	# DPTF enable
 	register "dptf_enable" = "1"
 
+	register "tcc_offset" = "10"     # TCC of 90
+
 	# Enable CNVi BT
 	register "CnviBtCore" = "true"