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mainboard/storm: setup mmu in storm mainboard_init 

enable protection of zero page access, provide for uncached device memory range,
and protect against access outside of DRAM except to device registers.

BUG=chrome-os-partner:28467
TEST=verified mmu.pagetable.list output:

_______address___________|_physical________________|sec|_d_|_size____|_permissions____________________|_glb|_shr|_pageflags______________________|
     C:00000000--000FFFFF| | | | | | | | |
     C:00100000--3FFFFFFF| A:00:00100000--3FFFFFFF| ns| 00| 00100000| P:readwrite U:readwrite notexec| yes| no | strongly ordered |
     C:40000000--428FFFFF| A:00:40000000--428FFFFF| ns| 00| 00100000| P:readwrite U:readwrite exec | yes| no | write-back/no write alloc |
     C:42900000--43CFFFFF| A:00:42900000--43CFFFFF| ns| 00| 00100000| P:readwrite U:readwrite notexec| yes| no | strongly ordered |
     C:43D00000--5FFFFFFF| A:00:43D00000--5FFFFFFF| ns| 00| 00100000| P:readwrite U:readwrite exec | yes| no | write-back/no write alloc |

Original-Change-Id: If9beb10938841aead5105d662f0aef741995d708
Original-Signed-off-by: Deepa Dinamani <deepad@codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/200341
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org>
(cherry picked from commit 09dd137453d8c6f1b60692b01226498e22f34fb2)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Conflicts:
	src/mainboard/google/storm/mainboard.c

Change-Id: Idff7e3f0bc5903933e9f1b980f595666380696d1
Reviewed-on: http://review.coreboot.org/8010
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Deepa Dinamani 2014-05-15 17:14:12 -07:00 committed by Kyösti Mälkki
parent 4d2d6ca79a
commit 2c04117eac
1 changed files with 36 additions and 2 deletions
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38
src/mainboard/google/storm/mainboard.c
View File

@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2013 Google Inc.
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -17,11 +17,45 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <device/device.h>
#include <arch/cache.h>
#include <boot/coreboot_tables.h>
#include <device/device.h>
#define TO_MB(x) ((x)>>20)
/* convenient shorthand (in MB) */
#define DRAM_START TO_MB(CONFIG_SYS_SDRAM_BASE)
#define DRAM_SIZE (CONFIG_DRAM_SIZE_MB)
#define DRAM_END (DRAM_START + DRAM_SIZE)
/* DMA memory for drivers */
#define DMA_START TO_MB(CONFIG_DRAM_DMA_START)
#define DMA_SIZE TO_MB(CONFIG_DRAM_DMA_SIZE)
static void setup_mmu(void)
{
dcache_mmu_disable();
/* Map Device memory. */
mmu_config_range(0, DRAM_START, DCACHE_OFF);
/* Disable Page 0 for trapping NULL pointer references. */
mmu_disable_range(0, 1);
/* Map DRAM memory */
mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
/* Map DMA memory */
if (DMA_SIZE)
mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF);
mmu_disable_range(DRAM_END, 4096 - DRAM_END);
mmu_init();
dcache_mmu_enable();
}
static void mainboard_init(device_t dev)
{
setup_mmu();
}
static void mainboard_enable(device_t dev)