diff --git a/src/soc/intel/denverton_ns/include/soc/sata.h b/src/soc/intel/denverton_ns/include/soc/sata.h
index afa39b5d65..f38b539353 100644
--- a/src/soc/intel/denverton_ns/include/soc/sata.h
+++ b/src/soc/intel/denverton_ns/include/soc/sata.h
@@ -23,9 +23,8 @@
 #define PCH_SATA0_DEV PCI_DEV(0, SATA_DEV, SATA_FUNC)
 #define PCH_SATA1_DEV PCI_DEV(0, SATA2_DEV, SATA2_FUNC)
 
-#define SATA_MAP 0x90
-#define SATA_MAP_AHCI (0 << 6)
-#define SATA_MAP_RAID (1 << 6)
-#define SATA_PSC 0x92
+#define SATAGC 0x9c
+#define SATAGC_AHCI (0 << 16)
+#define SATAGC_RAID (1 << 16)
 
 #endif //_DENVERTON_NS_SATA_H
diff --git a/src/soc/intel/denverton_ns/sata.c b/src/soc/intel/denverton_ns/sata.c
index d53d5535f0..891d95f934 100644
--- a/src/soc/intel/denverton_ns/sata.c
+++ b/src/soc/intel/denverton_ns/sata.c
@@ -31,7 +31,6 @@
 static void sata_init(struct device *dev)
 {
 	u32 reg32;
-	u16 reg16;
 	u32 abar;
 
 	printk(BIOS_DEBUG, "SATA: Initializing...\n");
@@ -46,10 +45,9 @@ static void sata_init(struct device *dev)
 	printk(BIOS_DEBUG, "SATA: Controller in AHCI mode.\n");
 
 	/* Set the controller mode */
-	reg16 = pci_read_config16(dev, SATA_MAP);
-	reg16 &= ~(3 << 6);
-	reg16 |= SATA_MAP_AHCI;
-	pci_write_config16(dev, SATA_MAP, reg16);
+	reg32 = pci_read_config32(dev, SATAGC);
+	reg32 &= ~SATAGC_AHCI;
+	pci_write_config32(dev, SATAGC, reg32);
 
 	/* Initialize AHCI memory-mapped space */
 	abar = pci_read_config32(dev, PCI_BASE_ADDRESS_5);