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mb/google/dedede: Configure EC <-> AP GPIOs 

BUG=b:150869661
TEST=Build and boot the mainboard. Trigger apreset from EC console.
Trigger reboot from AP console.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I0d6dd0b4264c11f7ee0ef436cc819b0bb92974f7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39325
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Karthikeyan Ramasubramanian 2020-03-05 11:58:34 -08:00 committed by Patrick Georgi
parent 8499f7fb1b
commit 2c208bddc9
3 changed files with 8 additions and 2 deletions
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4
src/mainboard/google/dedede/variants/baseboard/gpio.c
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@ -126,9 +126,9 @@ static const struct pad_config gpio_table[] = {
/* C13 : GPP_C13/UART1_TXD */ /* C13 : GPP_C13/UART1_TXD */
PAD_NC(GPP_C13, NONE), PAD_NC(GPP_C13, NONE),
/* C14 : EC_IN_RW_OD */ /* C14 : EC_IN_RW_OD */
PAD_NC(GPP_C14, NONE), PAD_CFG_GPI(GPP_C14, NONE, DEEP),
/* C15 : EC_AP_MKBP_INT_L */ /* C15 : EC_AP_MKBP_INT_L */
PAD_NC(GPP_C15, NONE), PAD_CFG_GPI_APIC(GPP_C15, NONE, PLTRST, LEVEL, INVERT),
/* C16 : AP_I2C_TRACKPAD_SDA_3V3 */ /* C16 : AP_I2C_TRACKPAD_SDA_3V3 */
PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
/* C17 : AP_I2C_TRACKPAD_SCL_3V3 */ /* C17 : AP_I2C_TRACKPAD_SCL_3V3 */

3
src/mainboard/google/dedede/variants/baseboard/include/baseboard/ec.h
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@ -79,4 +79,7 @@
#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */ #define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */
#define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */ #define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */
/* Enable EC SYNC IRQ, EC_SYNC_IRQ is defined in baseboard/gpio.h */
#define EC_ENABLE_SYNC_IRQ
#endif /* __BASEBOARD_EC_H__ */ #endif /* __BASEBOARD_EC_H__ */

3
src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h
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@ -18,6 +18,9 @@
/* EC wake is LAN_WAKE# which is a special DeepSX wake pin */ /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
#define GPE_EC_WAKE GPE0_LAN_WAK #define GPE_EC_WAKE GPE0_LAN_WAK
/* EC sync irq is GPP_C15_IRQ */
#define EC_SYNC_IRQ GPP_C15_IRQ
/* Memory configuration board straps */ /* Memory configuration board straps */
#define GPIO_MEM_CONFIG_0 GPP_C0 #define GPIO_MEM_CONFIG_0 GPP_C0
#define GPIO_MEM_CONFIG_1 GPP_C3 #define GPIO_MEM_CONFIG_1 GPP_C3