soc/intel/tigerlake: Move pmc_soc_set_afterg3_en to pmutil
pmc.c was included in the SMM object, but only needed the one function, pmc_soc_set_afterg3_en. pmutil.c was already doing power management- related functionality, and was included in SMM, so moving pmc_soc_set_afterg3_en to pmutil.c allows pmc.c to be removed from the SMM build. Change-Id: I87f65fd10d35f1f75516e804501d5319b81a0383 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41407 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -47,7 +47,6 @@ ramstage-y += me.c
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smm-y += gpio.c
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smm-y += p2sb.c
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smm-y += pmc.c
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smm-y += pmutil.c
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smm-y += smihandler.c
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smm-y += uart.c
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@ -17,23 +17,6 @@
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#include <soc/pm.h>
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#include <soc/soc_chip.h>
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/*
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* Set which power state system will be after reapplying
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* the power (from G3 State)
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*/
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void pmc_soc_set_afterg3_en(const bool on)
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{
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uint8_t reg8;
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uint8_t *const pmcbase = pmc_mmio_regs();
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reg8 = read8(pmcbase + GEN_PMCON_A);
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if (on)
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reg8 &= ~SLEEP_AFTER_POWER_FAIL;
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else
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reg8 |= SLEEP_AFTER_POWER_FAIL;
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write8(pmcbase + GEN_PMCON_A, reg8);
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}
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static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
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{
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uint32_t reg;
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@ -275,3 +275,20 @@ uint16_t get_pmbase(void)
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{
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return (uint16_t) ACPI_BASE_ADDRESS;
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}
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/*
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* Set which power state system will be after reapplying
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* the power (from G3 State)
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*/
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void pmc_soc_set_afterg3_en(const bool on)
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{
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uint8_t reg8;
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uint8_t *const pmcbase = pmc_mmio_regs();
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reg8 = read8(pmcbase + GEN_PMCON_A);
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if (on)
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reg8 &= ~SLEEP_AFTER_POWER_FAIL;
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else
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reg8 |= SLEEP_AFTER_POWER_FAIL;
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write8(pmcbase + GEN_PMCON_A, reg8);
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}
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