Superiotool: Add dump support to the Winbond W83697HF/F.
Minor coding style changes and code simplifications. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2791 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann
parent
e474956590
commit
2c290e3362
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@ -27,37 +27,38 @@ const static struct superio_registers reg_table[] = {
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{0x8705, "IT8705 or IT8700", {
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{EOT}}},
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{0x8708, "IT8708", {
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{NOLDN,
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{NOLDN, NULL,
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{0x07,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
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0x29,0x2a,0x2e,0x2f,EOT},
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{NANA,0x87,0x08,0x00,0x00,NANA,0x3f,0x00,0xff,0xff,
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0xff,0xff,0x00,0x00,EOT}},
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{0x0,
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{0x0, NULL,
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{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
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{0x00,0x03,0xf0,0x06,0x02,0x00,0x00,EOT}},
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{0x1,
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{0x1, NULL,
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x00,0x03,0xf8,0x04,0x00,EOT}},
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{0x2,
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{0x2, NULL,
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{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
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{0x00,0x02,0xf8,0x03,0x00,0x50,0x00,0x7f,EOT}},
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{0x3,
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{0x3, NULL,
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{0x30,0x60,0x61,0x62,0x63,0x64,0x65,0x70,0x74,
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0xf0,EOT},
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{0x00,0x03,0x78,0x07,0x78,0x00,0x80,0x07,0x03,
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0x03,EOT}},
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{0x4,
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{0x4, NULL,
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{0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,
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0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT},
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{NANA,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
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0x00,0x00,0x00,0x00,0x00,NANA,NANA,EOT}},
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{0x5, /* Note: 0x30 can actually be 0x00 _or_ 0x01. */
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{0x5, NULL,
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/* Note: 0x30 can actually be 0x00 _or_ 0x01. */
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{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT},
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{0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x00,EOT}},
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{0x6,
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{0x6, NULL,
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{0x30,0x70,0x71,0xf0,EOT},
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{0x00,0x0c,0x02,0x00,EOT}},
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{0x7,
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{0x7, NULL,
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{0x70,0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,
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0xbb,0xbc,0xbd,0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc8,
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0xc9,0xca,0xcb,0xcc,0xcd,0xd0,0xd1,0xd2,0xd3,0xd4,
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@ -70,46 +71,46 @@ const static struct superio_registers reg_table[] = {
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0x00,0x00,NANA,NANA,NANA,NANA,NANA,NANA,0x00,0x00,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,
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0x00,EOT}},
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{0x8,
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{0x8, NULL,
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{0x30,0x60,0x61,EOT},
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{0x00,0x02,0x01,EOT}},
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{0x9,
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{0x9, NULL,
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x00,0x03,0x10,0x0b,0x00,EOT}},
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{0xa,
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{0xa, NULL,
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x00,0x03,0x00,0x0a,0x00,EOT}},
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{EOT}}},
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{0x8710, "IT8710", {
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{EOT}}},
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{0x8712, "IT8712", {
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{NOLDN,
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{NOLDN, NULL,
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{0x07,0x20,0x21,0x22,0x23,0x24,0x2b,EOT},
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{NANA,0x87,0x12,0x08,0x00,0x00,0x00,EOT}},
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{0x0,
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{0x0, NULL,
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{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
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{0x00,0x03,0xf0,0x06,0x02,0x00,0x00,EOT}},
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{0x1,
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{0x1, NULL,
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{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
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{0x00,0x03,0xf8,0x04,0x00,0x50,0x00,0x7f,EOT}},
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{0x2,
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{0x2, NULL,
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{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
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{0x00,0x02,0xf8,0x03,0x00,0x50,0x00,0x7f,EOT}},
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{0x3,
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{0x3, NULL,
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{0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,EOT},
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{0x00,0x03,0x78,0x07,0x78,0x07,0x03,0x03,EOT}},
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{0x4,
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{0x4, NULL,
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{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
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0xf4,0xf5,0xf6,EOT},
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{0x00,0x02,0x90,0x02,0x30,0x09,0x00,0x00,0x00,0x00,
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0x00,NANA,NANA,EOT}},
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{0x5,
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{0x5, NULL,
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{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT},
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{0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x08,EOT}},
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{0x6,
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{0x6, NULL,
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{0x30,0x70,0x71,0xf0,EOT},
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{0x00,0x0c,0x02,0x00,EOT}},
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{0x7,
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{0x7, NULL,
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{0x25,0x26,0x27,0x28,0x29,0x2a,0x2c,0x60,0x61,0x62,
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0x63,0x64,0x65,0x70,0x71,0x72,0x73,0x74,0xb0,0xb1,
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0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,0xbb,0xbc,0xbd,
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@ -122,44 +123,44 @@ const static struct superio_registers reg_table[] = {
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0x01,0x00,0x00,0x40,0x00,0x01,0x00,0x00,0x40,0x00,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,0x00,EOT}},
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{0x8,
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{0x8, NULL,
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x00,0x03,0x00,0x0a,0x00,EOT}},
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{0x9,
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{0x9, NULL,
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{0x30,0x60,0x61,EOT},
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{0x00,0x02,0x01,EOT}},
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{0xa,
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{0xa, NULL,
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x00,0x03,0x10,0x0b,0x00,EOT}},
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{EOT}}},
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{0x8716, "IT8716", {
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{NOLDN,
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{NOLDN, NULL,
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{0x07,0x20,0x21,0x22,0x23,0x24,0x2b,EOT},
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{NANA,0x87,0x16,0x01,0x00,0x00,0x00,EOT}},
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{0x0,
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{0x0, NULL,
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{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
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{0x00,0x03,0xf0,0x06,0x02,0x00,0x00,EOT}},
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{0x1,
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{0x1, NULL,
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{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
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{0x00,0x03,0xf8,0x04,0x00,0x50,0x00,0x7f,EOT}},
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{0x2,
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{0x2, NULL,
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{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
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{0x00,0x02,0xf8,0x03,0x00,0x50,0x00,0x7f,EOT}},
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{0x3,
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{0x3, NULL,
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{0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,EOT},
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{0x00,0x03,0x78,0x07,0x78,0x07,0x03,0x03,EOT}},
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{0x4,
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{0x4, NULL,
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{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
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0xf4,0xf5,0xf6,EOT},
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{0x00,0x02,0x90,0x02,0x30,0x09,0x00,0x00,0x00,0x00,
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0x00,NANA,NANA,EOT}},
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{0x5,
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{0x5, NULL,
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{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT},
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{0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x00,EOT}},
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{0x6,
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{0x6, NULL,
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{0x30,0x70,0x71,0xf0,EOT},
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{0x00,0x0c,0x02,0x00,EOT}},
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{0x7,
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{0x7, NULL,
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{0x25,0x26,0x27,0x28,0x29,0x2a,0x2c,0x60,0x61,0x62,
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0x63,0x64,0x65,0x70,0x71,0x72,0x73,0x74,0xb0,0xb1,
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0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,0xbb,0xbc,0xbd,
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@ -172,13 +173,13 @@ const static struct superio_registers reg_table[] = {
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0x01,0x00,0x00,0x40,0x00,0x01,0x00,0x00,0x40,0x00,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,0x00,EOT}},
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{0x8,
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{0x8, NULL,
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x00,0x03,0x00,0x0a,0x00,EOT}},
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{0x9,
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{0x9, NULL,
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{0x30,0x60,0x61,EOT},
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{0x00,0x02,0x01,EOT}},
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{0xa,
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{0xa, NULL,
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x00,0x03,0x10,0x0b,0x00,EOT}},
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{EOT}}},
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@ -25,7 +25,7 @@
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const static struct superio_registers reg_table[] = {
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{0x28, "FDC37N769", {
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{NOLDN,
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{NOLDN, NULL,
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{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,
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0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,
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0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,
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@ -60,11 +60,58 @@ const char *get_superio_name(const struct superio_registers reg_table[],
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return "<unknown>";
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}
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void dump_superio(const char *vendor, const struct superio_registers reg_table[],
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static void dump_regs(const struct superio_registers reg_table[],
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int i, int j, uint16_t port)
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{
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int k, *idx;
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if (reg_table[i].ldn[j].ldn != NOLDN) {
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printf("LDN 0x%02x ", reg_table[i].ldn[j].ldn);
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if (reg_table[i].ldn[j].name != NULL)
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printf("(%s)", reg_table[i].ldn[j].name);
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regwrite(port, 0x07, reg_table[i].ldn[j].ldn);
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} else {
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printf("Register dump:");
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}
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idx = reg_table[i].ldn[j].idx;
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printf("\nidx ");
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for (k = 0; /* Nothing */; k++) {
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if (idx[k] == EOT)
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break;
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printf("%02x ", idx[k]);
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}
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printf("\nval ");
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for (k = 0; /* Nothing */; k++) {
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if (idx[k] == EOT)
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break;
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printf("%02x ", regval(port, idx[k]));
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}
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printf("\ndef ");
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idx = reg_table[i].ldn[j].def;
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for (k = 0; /* Nothing */; k++) {
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if (idx[k] == EOT)
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break;
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else if (idx[k] == NANA)
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printf("NA ");
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else if (idx[k] == RSVD)
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printf("RR ");
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else if (idx[k] == MISC) /* TODO */
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printf("MM ");
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else
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printf("%02x ", idx[k]);
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}
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printf("\n");
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}
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void dump_superio(const char *vendor,
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const struct superio_registers reg_table[],
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uint16_t port, uint16_t id)
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{
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int i, j, k, nodump;
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int *idx;
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int i, j, no_dump_available = 1;
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if (!dump)
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return;
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@ -76,66 +123,28 @@ void dump_superio(const char *vendor, const struct superio_registers reg_table[]
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if ((uint16_t)reg_table[i].superio_id != id)
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continue;
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nodump = 1;
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for (j = 0; /* Nothing */; j++) {
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if (reg_table[i].ldn[j].ldn == EOT)
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break;
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nodump = 0;
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if (reg_table[i].ldn[j].ldn != NOLDN) {
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printf("Switching to LDN 0x%02x\n",
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reg_table[i].ldn[j].ldn);
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regwrite(port, 0x07, reg_table[i].ldn[j].ldn);
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}
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idx = reg_table[i].ldn[j].idx;
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printf("idx ");
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for (k = 0; /* Nothing */; k++) {
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if (idx[k] == EOT)
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break;
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printf("%02x ", idx[k]);
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}
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printf("\nval ");
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for (k = 0; /* Nothing */; k++) {
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if (idx[k] == EOT)
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break;
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printf("%02x ", regval(port, idx[k]));
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}
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printf("\ndef ");
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idx = reg_table[i].ldn[j].def;
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for (k = 0; /* Nothing */; k++) {
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if (idx[k] == EOT)
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break;
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else if (idx[k] == NANA)
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printf("NA ");
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else if (idx[k] == RSVD)
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printf("RR ");
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else if (idx[k] == MISC) /* TODO */
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printf("MM ");
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else
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printf("%02x ", idx[k]);
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}
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printf("\n");
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no_dump_available = 0;
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dump_regs(reg_table, i, j, port);
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}
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if (nodump)
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printf("No dump for %s %s\n", vendor, reg_table[i].name);
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if (no_dump_available)
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printf("No dump available for this Super I/O\n");
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}
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}
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void no_superio_found(uint16_t port) {
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void no_superio_found(uint16_t port)
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{
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if (!verbose)
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return;
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if (inb(port) == 0xff)
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printf("No Super I/O chip found at 0x%04x\n", port);
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else
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printf("Probing 0x%04x, failed (0x%02x), data returns 0x%02x\n", port, inb(port), inb(port + 1));
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printf("Probing 0x%04x, failed (0x%02x), data returns 0x%02x\n",
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port, inb(port), inb(port + 1));
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}
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int main(int argc, char *argv[])
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@ -61,6 +61,7 @@ struct superio_registers {
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const char name[MAXNAMELEN];
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struct {
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int ldn;
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const char *name;
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int idx[IDXSIZE];
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int def[IDXSIZE];
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} ldn[LDNSIZE];
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@ -30,57 +30,97 @@
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*/
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const static struct superio_registers reg_table[] = {
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{0x601, "W83697HF/F", {
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/*
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{NOLDN,
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{0x20,0x21,EOT},
|
||||
{0x60,NANA,EOT}},
|
||||
*/
|
||||
{NOLDN, NULL,
|
||||
/* TODO: 0x02, 0x07. */
|
||||
{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x29,
|
||||
0x2a,EOT},
|
||||
{0x60,NANA,0xff,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
MISC,EOT}},
|
||||
/* Some register defaults depend on the value of PNPCSV. */
|
||||
{0x0, "Floppy",
|
||||
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
|
||||
0xf5,EOT},
|
||||
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
|
||||
0x00,EOT}},
|
||||
{0x1, "Parallel port",
|
||||
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
|
||||
{0x01,0x03,0x78,0x07,0x04,0x3f,EOT}},
|
||||
{0x2, "COM1",
|
||||
{0x30,0x60,0x61,0x70,0xf0,EOT},
|
||||
{0x01,0x03,0xf8,0x04,0x00,EOT}},
|
||||
{0x3, "COM2",
|
||||
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
|
||||
{0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
|
||||
{0x6, "CIR",
|
||||
{0x30,0x60,0x61,0x70,EOT},
|
||||
{0x00,0x00,0x00,0x00,EOT}},
|
||||
{0x7, "Game port, GPIO port 1",
|
||||
{0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT},
|
||||
{0x00,0x02,0x01,0x00,0x00,0xff,0x00,0x00,EOT}},
|
||||
{0x8, "MIDI port, GPIO port 5",
|
||||
{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
|
||||
0xf4,0xf5,EOT},
|
||||
{0x00,0x03,0x30,0x00,0x00,0x09,0xff,0x00,0x00,0x00,
|
||||
0x00,0x00,EOT}},
|
||||
{0x9, "GPIO port 2, 3, and 4",
|
||||
{0x30,0x60,0x61,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
|
||||
0xf7,0xf8,0xf5,EOT},
|
||||
{0x00,0x00,0x00,0xff,0x00,0x00,0xff,0x00,0x00,0xff,
|
||||
0x00,0x00,0x00,EOT}},
|
||||
{0xa, "ACPI",
|
||||
{0x30,0x70,0xe0,0xe1,0xe2,0xe5,0xe6,0xe7,
|
||||
0xf0,0xf1,0xf3,0xf4,0xf6,0xf7,0xf9,EOT},
|
||||
{0x00,0x00,0x00,0x00,NANA,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
|
||||
{0xb, "Hardware monitor",
|
||||
{0x30,0x60,0x61,0x70,EOT},
|
||||
{0x00,0x00,0x00,0x00,EOT}},
|
||||
{EOT}}},
|
||||
{0x886, "W83627EHF/EF/EHG/EG", {
|
||||
{NOLDN,
|
||||
{NOLDN, NULL,
|
||||
{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
|
||||
0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
|
||||
{0x88,NANA,0xff,0x00,MISC,0x00,MISC,RSVD,0x50,
|
||||
0x04,0x00,RSVD,0x00,0x21,0x00,0x00,EOT}},
|
||||
{0x0,
|
||||
{0x0, NULL,
|
||||
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
|
||||
0xf5,EOT},
|
||||
{0x01,0x03,0xf0,0x06,0x02,0x8e,0x00,0xff,0x00,
|
||||
0x00,EOT}},
|
||||
{0x1,
|
||||
{0x1, NULL,
|
||||
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
|
||||
{0x01,0x03,0x78,0x07,0x04,0x3f,EOT}},
|
||||
{0x2,
|
||||
{0x2, NULL,
|
||||
{0x30,0x60,0x61,0x70,0xf0,EOT},
|
||||
{0x01,0x03,0xf8,0x04,0x00,EOT}},
|
||||
{0x3,
|
||||
{0x3, NULL,
|
||||
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
|
||||
{0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
|
||||
{0x5,
|
||||
{0x5, NULL,
|
||||
{0x30,0x60,0x61,0x62,0x63,0x70,0x72,0xf0,EOT},
|
||||
{0x01,0x00,0x60,0x00,0x64,0x01,0x0c,0x83,EOT}},
|
||||
{0x6,
|
||||
{0x6, NULL,
|
||||
{0x30,0x62,0x63,EOT},
|
||||
{0x00,0x00,0x00,EOT}},
|
||||
{0x7,
|
||||
{0x7, NULL,
|
||||
{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
|
||||
0xf4,0xf5,0xf6,0xf7,EOT},
|
||||
{0x00,0x02,0x01,0x03,0x30,0x09,0xff,0x00,0x00,0x00,
|
||||
0xff,0x00,0x00,0x00,EOT}},
|
||||
{0x8,
|
||||
{0x8, NULL,
|
||||
{0x30,0xf5,0xf6,0xf7,EOT},
|
||||
{0x00,0x00,0x00,0x00,EOT}},
|
||||
{0x9,
|
||||
{0x9, NULL,
|
||||
{0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xf0,0xf1,0xf2,
|
||||
0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
|
||||
{0x00,0xff,0x00,0x00,0xff,0x00,0x00,0xff,0x00,0x00,
|
||||
0x00,0xff,0x00,0x00,0x00,EOT}},
|
||||
{0xa,
|
||||
{0xa, NULL,
|
||||
{0x30,0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,
|
||||
0xe8,0xf2,0xf3,0xf4,0xf6,0xf7,EOT},
|
||||
{0x00,0x00,0x01,0x00,0xff,0x08,0x00,RSVD,0x00,0x00,
|
||||
RSVD,0x7c,0x00,0x00,0x00,0x00,EOT}},
|
||||
{0xb,
|
||||
{0xb, NULL,
|
||||
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
|
||||
{0x00,0x00,0x00,0x00,0xc1,0x00,EOT}},
|
||||
{EOT}}},
|
||||
|
|
|
|||
Loading…
Reference in New Issue