mb,sb,soc/intel: Drop useless IO trap handlers
There are four requirements for the SMI to hit a printk() this commit now removes. Build must have DEBUG_SMI=y, otherwise any printk() is a no-op inside SMM. ASL must have a TRAP() with argument 0x99 or 0x32 for SMIF value. Platform needs to have IO Trap #3 enabled at IO 0x800. The SMI monitor must call io_trap_handler for IO Trap #3. At the moment, only getac/p470 would meet the above criteria with TRAP(0x32) in its DSDT _INI method. The ASL ignores any return value of TRAP() calls made. A mainboard IO trap handler should have precedence over a southbridge IO trap handler. At the moment we seem to have no cases of the latter to support, so remove the latter. Change-Id: I3a3298c8d9814db8464fbf7444c6e0e6ac6ac008 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70365 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
parent
3c528f2830
commit
2c3ebd8b9d
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@ -65,9 +65,6 @@ void io_trap_handler(int smif)
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*/
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printk(BIOS_DEBUG, "SMI function trap 0x%x: ", smif);
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if (southbridge_io_trap_handler(smif))
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return;
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if (mainboard_io_trap_handler(smif))
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return;
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@ -34,7 +34,6 @@ int apm_control(u8 cmd);
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u8 apm_get_apmc(void);
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void io_trap_handler(int smif);
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int southbridge_io_trap_handler(int smif);
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int mainboard_io_trap_handler(int smif);
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void southbridge_smi_set_eos(void);
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@ -19,28 +19,6 @@
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#define GPIO_SUS7_WAKE_MASK (1 << 12)
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#define GPIO_SUS1_WAKE_MASK (1 << 13)
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int mainboard_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x99:
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printk(BIOS_DEBUG, "Sample\n");
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gnvs->smif = 0;
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break;
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default:
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return 0;
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}
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/*
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* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*
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* For now, we force the return value to 0 and log all traps to
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* see what's going on.
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*/
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//gnvs->smif = 0;
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return 1;
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}
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static uint8_t mainboard_smi_ec(void)
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{
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uint8_t cmd = google_chromeec_get_event();
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@ -6,32 +6,11 @@
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#include <ec/google/chromeec/smm.h>
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#include <gpio.h>
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#include <soc/iomap.h>
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#include <soc/nvs.h>
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#include <soc/pm.h>
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#include <intelblocks/smihandler.h>
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#include "ec.h"
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#include <variant/gpio.h>
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int mainboard_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x99:
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printk(BIOS_DEBUG, "Sample\n");
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gnvs->smif = 0;
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break;
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default:
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return 0;
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}
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/* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*
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* For now, we force the return value to 0 and log all traps to
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* see what's going on.
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*/
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return 1;
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}
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void mainboard_smi_gpi_handler(const struct gpi_status *sts)
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{
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if (gpi_status_get(sts, EC_SMI_GPI))
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@ -7,29 +7,8 @@
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#include <ec/google/chromeec/ec.h>
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#include <soc/iomap.h>
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#include <soc/nvs.h>
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#include "onboard.h"
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int mainboard_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x99:
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printk(BIOS_DEBUG, "Sample\n");
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gnvs->smif = 0;
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break;
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default:
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return 0;
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}
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/* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*
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* For now, we force the return value to 0 and log all traps to
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* see what's going on.
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*/
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return 1;
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}
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/* gpi_sts is GPIO 47:32 */
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void mainboard_smi_gpi(u32 gpi_sts)
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{
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@ -4,32 +4,11 @@
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#include <cpu/x86/smm.h>
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#include <ec/google/chromeec/smm.h>
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#include <soc/iomap.h>
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#include <soc/nvs.h>
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#include <soc/pm.h>
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#include <intelblocks/smihandler.h>
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#include "ec.h"
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#include <variant/gpio.h>
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int mainboard_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x99:
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printk(BIOS_DEBUG, "Sample\n");
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gnvs->smif = 0;
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break;
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default:
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return 0;
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}
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/* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*
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* For now, we force the return value to 0 and log all traps to
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* see what's going on.
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*/
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return 1;
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}
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void mainboard_smi_gpi_handler(const struct gpi_status *sts)
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{
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if (CONFIG(BOARD_INTEL_KBLRVP8))
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@ -4,32 +4,11 @@
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#include <cpu/x86/smm.h>
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#include <ec/google/chromeec/smm.h>
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#include <soc/iomap.h>
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#include <soc/nvs.h>
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#include <soc/pm.h>
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#include <intelblocks/smihandler.h>
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#include "ec.h"
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#include "gpio.h"
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int mainboard_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x99:
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printk(BIOS_DEBUG, "Sample\n");
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gnvs->smif = 0;
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break;
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default:
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return 0;
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}
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/* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*
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* For now, we force the return value to 0 and log all traps to
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* see what's going on.
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*/
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return 1;
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}
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void mainboard_smi_gpi_handler(const struct gpi_status *sts)
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{
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if (gpi_status_get(sts, EC_SMI_GPI))
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@ -18,28 +18,6 @@
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/* The wake gpio is SUS_GPIO[0]. */
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#define WAKE_GPIO_EN SUS_GPIO_EN0
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int mainboard_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x99:
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printk(BIOS_DEBUG, "Sample\n");
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gnvs->smif = 0;
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break;
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default:
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return 0;
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}
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/*
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* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*
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* For now, we force the return value to 0 and log all traps to
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* see what's going on.
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*/
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//gnvs->smif = 0;
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return 1;
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}
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static uint8_t mainboard_smi_ec(void)
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{
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uint8_t cmd = google_chromeec_get_event();
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@ -20,24 +20,6 @@
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#include <soc/nvs.h>
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#include <soc/device_nvs.h>
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int southbridge_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x32:
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printk(BIOS_DEBUG, "OS Init\n");
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/*
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* gnvs->smif:
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* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*/
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gnvs->smif = 0;
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return 1; /* IO trap handled */
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}
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/* Not handled */
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return 0;
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}
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void southbridge_smi_set_eos(void)
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{
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enable_smi(EOS);
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@ -18,24 +18,6 @@
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#include <soc/gpio.h>
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#include <smmstore.h>
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int southbridge_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x32:
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printk(BIOS_DEBUG, "OS Init\n");
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/*
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* gnvs->smif:
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* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*/
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gnvs->smif = 0;
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return 1; /* IO trap handled */
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}
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/* Not handled */
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return 0;
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}
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void southbridge_smi_set_eos(void)
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{
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enable_smi(EOS);
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@ -23,23 +23,6 @@
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#include <drivers/intel/gma/i915_reg.h>
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#include <smmstore.h>
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int southbridge_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x32:
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printk(BIOS_DEBUG, "OS Init\n");
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/* gnvs->smif:
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* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*/
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gnvs->smif = 0;
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return 1; /* IO trap handled */
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}
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/* Not handled */
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return 0;
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}
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/**
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* @brief Set the EOS bit
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*/
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@ -21,24 +21,6 @@
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/* Trapped write data */
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#define PCR_PSTH_TRPD 0x1E18
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/* Inherited from cpu/x86/smm.h resulting in a different signature */
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int southbridge_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x32:
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printk(BIOS_DEBUG, "OS Init\n");
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/*
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* gnvs->smif:
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* - On success, the IO Trap Handler returns 0
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* - On failure, the IO Trap Handler returns a value != 0
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*/
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gnvs->smif = 0;
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return 1; /* IO trap handled */
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}
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/* Not handled */
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return 0;
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}
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void smihandler_southbridge_mc(
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const struct smm_save_state_ops *save_state_ops)
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@ -17,23 +17,6 @@
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#include <soc/pm.h>
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#include <soc/nvs.h>
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int southbridge_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x32:
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printk(BIOS_DEBUG, "OS Init\n");
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/* gnvs->smif:
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* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*/
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gnvs->smif = 0;
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return 1; /* IO trap handled */
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}
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/* Not handled */
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return 0;
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}
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void southbridge_smi_set_eos(void)
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{
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enable_smi(EOS);
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@ -19,23 +19,6 @@
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#include "pch.h"
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int southbridge_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x32:
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printk(BIOS_DEBUG, "OS Init\n");
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/* gnvs->smif:
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* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*/
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gnvs->smif = 0;
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return 1; /* IO trap handled */
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}
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/* Not handled */
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return 0;
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}
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static void southbridge_gate_memory_reset_real(int offset,
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u16 use, u16 io, u16 lvl)
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{
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@ -19,23 +19,6 @@
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/* While we read PMBASE dynamically in case it changed, let's initialize it with a sane value */
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u16 pmbase = DEFAULT_PMBASE;
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int southbridge_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x32:
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printk(BIOS_DEBUG, "OS Init\n");
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/* gnvs->smif:
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* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*/
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gnvs->smif = 0;
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return 1; /* IO trap handled */
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}
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/* Not handled */
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return 0;
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}
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void southbridge_smi_monitor(void)
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{
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#define IOTRAP(x) (trap_sts & (1 << x))
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@ -9,23 +9,6 @@
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#include <soc/nvs.h>
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int southbridge_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x32:
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printk(BIOS_DEBUG, "OS Init\n");
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/* gnvs->smif:
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* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*/
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gnvs->smif = 0;
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return 1; /* IO trap handled */
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}
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/* Not handled */
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return 0;
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}
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void southbridge_smi_monitor(void)
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{
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#define IOTRAP(x) (trap_sts & (1 << x))
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@ -19,23 +19,6 @@
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#include "me.h"
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#include "pch.h"
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int southbridge_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x32:
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printk(BIOS_DEBUG, "OS Init\n");
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/* gnvs->smif:
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* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*/
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gnvs->smif = 0;
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return 1; /* IO trap handled */
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}
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/* Not handled */
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return 0;
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}
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/**
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* @brief Set the EOS bit
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*/
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