mb: Fix non-local header treated as local

Change-Id: Ib39305effdb00e032ca07e6d0e0d84cdf3dcf916
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29098
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

src/mainboard/amd/inagua/mainboard.c

@@ -15,9 +15,8 @@
 
 #include <console/console.h>
 #include <device/device.h>
-
 #include <southbridge/amd/sb800/sb800.h>
-#include "SBPLATFORM.h"	/* Platform Specific Definitions */
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>	/* Platform Specific Definitions */
 
 static void init_gpios(void)
 {

src/mainboard/amd/inagua/mptable.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
 #include <device/pci.h>
@@ -21,7 +20,7 @@
 #include <arch/ioapic.h>
 #include <string.h>
 #include <stdint.h>
-#include <SBPLATFORM.h>
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 
 u8 intr_data[] = {
 	[0x00] = 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, /* INTA# - INTH# */

src/mainboard/amd/lamar/romstage.c

@@ -32,7 +32,7 @@
 #include <cpu/x86/lapic.h>
 #include <southbridge/amd/common/amd_defs.h>
 #include <southbridge/amd/pi/hudson/hudson.h>
-#include "superio/fintek/f81216h/f81216h.h"
+#include <superio/fintek/f81216h/f81216h.h>
 
 #define SERIAL_DEV PNP_DEV(0x4e, F81216H_SP1)
 

src/mainboard/amd/persimmon/mainboard.c

@@ -17,10 +17,9 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <arch/io.h>
-
 #include <southbridge/amd/common/amd_pci_util.h>
 #include <southbridge/amd/cimx/cimx_util.h>
-#include "SBPLATFORM.h"
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 #include <southbridge/amd/cimx/sb800/pci_devs.h>
 #include <northbridge/amd/agesa/family14/pci_devs.h>
 

src/mainboard/amd/persimmon/mptable.c

@@ -14,14 +14,13 @@
  * GNU General Public License for more details.
  */
 
-
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
 #include <device/pci.h>
 #include <arch/io.h>
 #include <string.h>
 #include <stdint.h>
-#include <SBPLATFORM.h>
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 #include <southbridge/amd/common/amd_pci_util.h>
 #include <drivers/generic/ioapic/chip.h>
 #include <arch/ioapic.h>

src/mainboard/amd/south_station/mainboard.c

@@ -16,9 +16,8 @@
 #include <console/console.h>
 #include <delay.h>
 #include <device/device.h>
-
 #include <southbridge/amd/sb800/sb800.h>
-#include "SBPLATFORM.h" 	/* Platform Specific Definitions */
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>	/* Platform Specific Definitions */
 
 /**
  * Southstation using SB GPIO 17/18 to control the Red/Green LED

src/mainboard/amd/south_station/mptable.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
 #include <device/pci.h>
@@ -21,8 +20,7 @@
 #include <arch/ioapic.h>
 #include <string.h>
 #include <stdint.h>
-#include <SBPLATFORM.h>
-
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 
 u8 intr_data[] = {
 	[0x00] = 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, /* INTA# - INTH# */

src/mainboard/amd/torpedo/fadt.c

@@ -18,13 +18,12 @@
  * ACPI - create the Fixed ACPI Description Tables (FADT)
  */
 
-
 #include <string.h>
 #include <console/console.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <device/device.h>
-#include "SbPlatform.h"
+#include <southbridge/amd/cimx/sb900/SbPlatform.h>
 
 /*extern*/ u16 pm_base = 0x800;
 /* pm_base should be set in sb ACPI */

src/mainboard/amd/torpedo/gpio.c

@@ -13,9 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#include "SbPlatform.h"
+#include <southbridge/amd/cimx/sb900/SbPlatform.h>
 #include "gpio.h"
-#include "vendorcode/amd/cimx/sb900/AmdSbLib.h"
+#include <vendorcode/amd/cimx/sb900/AmdSbLib.h>
 
 
 #ifndef SB_GPIO_REG01

src/mainboard/amd/torpedo/mptable.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
 #include <device/pci.h>
@@ -22,7 +21,7 @@
 #include <stdint.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>
-#include "SbPlatform.h"
+#include <southbridge/amd/cimx/sb900/SbPlatform.h>
 
 #define IO_APIC_ID CONFIG_MAX_CPUS
 u32 apicid_sb900;

src/mainboard/amd/union_station/mainboard.c

@@ -15,9 +15,8 @@
 
 #include <console/console.h>
 #include <device/device.h>
-
 #include <southbridge/amd/sb800/sb800.h>
-#include "SBPLATFORM.h" 	/* Platform Specific Definitions */
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>	/* Platform Specific Definitions */
 
 /**********************************************
  * Enable the dedicated functions of the board.

src/mainboard/amd/union_station/mptable.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
 #include <device/pci.h>
@@ -21,8 +20,7 @@
 #include <arch/ioapic.h>
 #include <string.h>
 #include <stdint.h>
-#include <SBPLATFORM.h>
-
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 
 u8 intr_data[] = {
 	[0x00] = 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, /* INTA# - INTH# */

src/mainboard/asrock/e350m1/mainboard.c

@@ -16,9 +16,8 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <arch/io.h>
-
 #include <southbridge/amd/cimx/cimx_util.h>
-#include "SBPLATFORM.h"
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 
 /**********************************************
  * Enable the dedicated functions of the board.

src/mainboard/asus/kcma-d8/dsdt.asl

@@ -557,7 +557,7 @@ DefinitionBlock (
 					})
 				}
 
-				#include "../../../superio/winbond/w83667hg-a/ps2_controller.asl"
+				#include <superio/winbond/w83667hg-a/ps2_controller.asl>
 
 				/* UART 1 */
 				Device (URT1)

src/mainboard/asus/kgpe-d16/dsdt.asl

@@ -557,7 +557,7 @@ DefinitionBlock (
 					})
 				}
 
-				#include "../../../superio/winbond/w83667hg-a/ps2_controller.asl"
+				#include <superio/winbond/w83667hg-a/ps2_controller.asl>
 
 				/* UART 1 */
 				Device (URT1)

src/mainboard/asus/p2b-ls/dsdt.asl

@@ -248,7 +248,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE  ", "COREBOOT", 1)
 				}
 			}
 
-			#include "superio/winbond/w83977tf/acpi/superio.asl"
+			#include <superio/winbond/w83977tf/acpi/superio.asl>
 		}
 	}
 

src/mainboard/asus/p2b/dsdt.asl

@@ -234,7 +234,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE  ", "COREBOOT", 1)
 				}
 			}
 
-			#include "superio/winbond/w83977tf/acpi/superio.asl"
+			#include <superio/winbond/w83977tf/acpi/superio.asl>
 		}
 	}
 

src/mainboard/elmex/pcm205400/mainboard.c

@@ -19,7 +19,7 @@
 #include <arch/io.h>
 #include <southbridge/amd/common/amd_pci_util.h>
 #include <southbridge/amd/cimx/cimx_util.h>
-#include "SBPLATFORM.h"
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 #include <southbridge/amd/cimx/sb800/pci_devs.h>
 #include <northbridge/amd/agesa/family14/pci_devs.h>
 

src/mainboard/elmex/pcm205400/mptable.c

@@ -14,14 +14,13 @@
  * GNU General Public License for more details.
  */
 
-
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
 #include <device/pci.h>
 #include <arch/io.h>
 #include <string.h>
 #include <stdint.h>
-#include <SBPLATFORM.h>
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 #include <southbridge/amd/common/amd_pci_util.h>
 #include <drivers/generic/ioapic/chip.h>
 #include <arch/ioapic.h>

src/mainboard/gizmosphere/gizmo/mainboard.c

@@ -20,9 +20,8 @@
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
-
 #include <southbridge/amd/sb800/sb800.h>
-#include "SBPLATFORM.h"
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 
 /**********************************************
  * Enable the dedicated functions of the board.

src/mainboard/gizmosphere/gizmo/mptable.c

@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
 #include <device/pci.h>
@@ -22,8 +21,7 @@
 #include <arch/ioapic.h>
 #include <string.h>
 #include <stdint.h>
-#include <SBPLATFORM.h>
-
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 
 u8 intr_data[] = {
 	[0x00] = 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, /* INTA# - INTH# */

src/mainboard/google/beltino/acpi/superio.asl

@@ -28,4 +28,4 @@
 #define SIO_GPIO_IO0      0x720	// pnp 2e.7: io 0x60
 #define SIO_GPIO_IO1      0x730	// pnp 2e.7: io 0x60
 
-#include "superio/ite/it8772f/acpi/superio.asl"
+#include <superio/ite/it8772f/acpi/superio.asl>

src/mainboard/google/jecht/acpi/superio.asl

@@ -28,4 +28,4 @@
 #define SIO_GPIO_IO0	0x720	// pnp 2e.7: io 0x60
 #define SIO_GPIO_IO1	0x730	// pnp 2e.7: io 0x60
 
-#include "superio/ite/it8772f/acpi/superio.asl"
+#include <superio/ite/it8772f/acpi/superio.asl>

src/mainboard/intel/baskingridge/acpi/superio.asl

@@ -28,4 +28,4 @@
 #define SIO_GPIO_IO0      0x720  // pnp 2e.7: io 0x60
 #define SIO_GPIO_IO1      0x730  // pnp 2e.7: io 0x60
 
-#include "superio/smsc/sio1007/acpi/superio.asl"
+#include <superio/smsc/sio1007/acpi/superio.asl>

src/mainboard/intel/baskingridge/dsdt.asl

@@ -36,7 +36,7 @@ DefinitionBlock(
 
 	#include "acpi/thermal.asl"
 
-	#include "../../../cpu/intel/haswell/acpi/cpu.asl"
+	#include <cpu/intel/haswell/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/cougar_canyon2/acpi/superio.asl

@@ -28,4 +28,4 @@
 #define SIO_GPIO_IO0      0x720  // pnp 2e.7: io 0x60
 #define SIO_GPIO_IO1      0x730  // pnp 2e.7: io 0x60
 
-#include "superio/smsc/sio1007/acpi/superio.asl"
+#include <superio/smsc/sio1007/acpi/superio.asl>

src/mainboard/intel/dcp847ske/acpi/superio.asl

@@ -25,4 +25,4 @@
 #define NCT6776_SHOW_HWM	1
 #define NCT6776_SHOW_GPIO	1
 
-#include "superio/nuvoton/nct6776/acpi/superio.asl"
+#include <superio/nuvoton/nct6776/acpi/superio.asl>

src/mainboard/intel/emeraldlake2/acpi/superio.asl

@@ -28,4 +28,4 @@
 #define SIO_GPIO_IO0      0x720  // pnp 2e.7: io 0x60
 #define SIO_GPIO_IO1      0x730  // pnp 2e.7: io 0x60
 
-#include "superio/smsc/sio1007/acpi/superio.asl"
+#include <superio/smsc/sio1007/acpi/superio.asl>

src/mainboard/intel/emeraldlake2/dsdt.asl

@@ -37,7 +37,7 @@ DefinitionBlock(
 	// General Purpose Events
 	//#include "acpi/gpe.asl"
 
-	#include "../../../cpu/intel/model_206ax/acpi/cpu.asl"
+	#include <cpu/intel/model_206ax/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/lippert/frontrunner-af/mainboard.c

@@ -21,8 +21,8 @@
 #include <device/pci_def.h>
 #include <southbridge/amd/sb800/sb800.h>
 #include <arch/acpi.h>
-#include "SBPLATFORM.h"
-#include "OEM.h" /* SMBUS0_BASE_ADDRESS */
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
+#include <vendorcode/amd/cimx/sb800/OEM.h> /* SMBUS0_BASE_ADDRESS */
 #include <southbridge/amd/cimx/sb800/gpio_oem.h>
 #include "sema.h"
 

src/mainboard/lippert/frontrunner-af/mptable.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
 #include <device/pci.h>
@@ -21,7 +20,7 @@
 #include <arch/ioapic.h>
 #include <string.h>
 #include <stdint.h>
-#include <SBPLATFORM.h>
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 
 u8 intr_data[] = {
 	[0x00] = 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, /* INTA# - INTH# */

src/mainboard/lippert/toucan-af/mainboard.c

@@ -21,8 +21,8 @@
 #include <device/pci_def.h>
 #include <southbridge/amd/sb800/sb800.h>
 #include <arch/acpi.h>
-#include "SBPLATFORM.h"
-#include "OEM.h" /* SMBUS0_BASE_ADDRESS */
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
+#include <vendorcode/amd/cimx/sb800/OEM.h> /* SMBUS0_BASE_ADDRESS */
 #include <southbridge/amd/cimx/sb800/gpio_oem.h>
 #include "mainboard/lippert/frontrunner-af/sema.h"
 

src/mainboard/lippert/toucan-af/mptable.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
 #include <device/pci.h>
@@ -21,7 +20,7 @@
 #include <arch/ioapic.h>
 #include <string.h>
 #include <stdint.h>
-#include <SBPLATFORM.h>
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 
 u8 intr_data[] = {
 	[0x00] = 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, /* INTA# - INTH# */

src/mainboard/pcengines/apu1/gpio_ftns.c

@@ -15,7 +15,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include "SBPLATFORM.h"
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 #include <southbridge/amd/cimx/cimx_util.h>
 #include "gpio_ftns.h"
 

src/mainboard/pcengines/apu1/mainboard.c

@@ -24,7 +24,7 @@
 #include <arch/acpi.h>
 #include <smbios.h>
 #include <string.h>
-#include "SBPLATFORM.h"
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 #include <southbridge/amd/cimx/sb800/pci_devs.h>
 #include <northbridge/amd/agesa/family14/pci_devs.h>
 #include <superio/nuvoton/nct5104d/nct5104d.h>

src/mainboard/pcengines/apu1/mptable.c

@@ -14,14 +14,13 @@
  * GNU General Public License for more details.
  */
 
-
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
 #include <device/pci.h>
 #include <arch/io.h>
 #include <string.h>
 #include <stdint.h>
-#include <SBPLATFORM.h>
+#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
 #include <southbridge/amd/common/amd_pci_util.h>
 #include <drivers/generic/ioapic/chip.h>
 #include <arch/ioapic.h>

src/mainboard/samsung/lumpy/acpi/superio.asl

@@ -31,4 +31,4 @@
 #define SIO_ENABLE_SMBX          // pnp 2e.9: Enable Mailbox
 #define SIO_SMBX_IO0      0xa00  // pnp 2e.9: io 0xa00
 
-#include "superio/smsc/mec1308/acpi/superio.asl"
+#include <superio/smsc/mec1308/acpi/superio.asl>

src/mainboard/samsung/stumpy/acpi/superio.asl

@@ -28,4 +28,4 @@
 #define SIO_GPIO_IO0      0x720  // pnp 2e.7: io 0x60
 #define SIO_GPIO_IO1      0x730  // pnp 2e.7: io 0x60
 
-#include "superio/ite/it8772f/acpi/superio.asl"
+#include <superio/ite/it8772f/acpi/superio.asl>