coreboot_table: Convert some CONFIG(CHROMEOS) preprocessor
Change-Id: I1e63a419db92642df6b7956050c39540c2ae11d6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48781 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -152,7 +152,6 @@ void lb_add_gpios(struct lb_gpios *gpios, const struct lb_gpio *gpio_table,
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gpios->size += table_size;
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}
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#if CONFIG(CHROMEOS)
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static void lb_gpios(struct lb_header *header)
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{
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struct lb_gpios *gpios;
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@ -191,6 +190,7 @@ static void lb_gpios(struct lb_header *header)
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}
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}
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#if CONFIG(CHROMEOS)
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static void lb_vbnv(struct lb_header *header)
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{
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#if CONFIG(PC80_SYSTEM)
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@ -487,10 +487,11 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end)
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/* Record our framebuffer */
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lb_framebuffer(head);
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#if CONFIG(CHROMEOS)
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/* Record our GPIO settings (ChromeOS specific) */
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if (CONFIG(CHROMEOS))
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lb_gpios(head);
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#if CONFIG(CHROMEOS)
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/* pass along VBNV offsets in CMOS */
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lb_vbnv(head);
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#endif
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@ -511,9 +512,8 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end)
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/* Add board-specific table entries, if any. */
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lb_board(head);
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#if CONFIG(CHROMEOS_RAMOOPS)
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if (CONFIG(CHROMEOS_RAMOOPS))
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lb_ramoops(head);
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#endif
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lb_boot_media_params(head);
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@ -203,8 +203,8 @@ struct chip_operations mainboard_ops = {
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void lb_board(struct lb_header *header)
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{
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#if CONFIG(CHROMEOS)
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if (CONFIG(CHROMEOS))
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lb_table_add_serialno_from_vpd(header);
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#endif
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soc_add_mtc(header);
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}
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@ -110,8 +110,7 @@ void lb_board(struct lb_header *header)
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dma->range_start = (uintptr_t)_dma_coherent;
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dma->range_size = REGION_SIZE(dma_coherent);
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#if CONFIG(CHROMEOS)
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/* Retrieve the switch interface MAC addresses. */
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if (CONFIG(CHROMEOS))
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lb_table_add_macs_from_vpd(header);
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#endif
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}
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