From 2c70708a78d137f322bc32556b5b3a13962dfa46 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Mon, 19 Oct 2020 17:40:02 +0200 Subject: [PATCH] soc/intel/common/block/smbus: Add Cannonpoint PCH-H PCI ID This is required to make sure the defined SMBUS_BASE address is valid even after PCI enumeration. Tested on Prodrive Hermes. Change-Id: Ibd40e556fd890000836d23682d4e9e3aa5200c54 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/46562 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/soc/intel/common/block/smbus/smbus.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c index 8ba9d7a7b1..59870fbdc8 100644 --- a/src/soc/intel/common/block/smbus/smbus.c +++ b/src/soc/intel/common/block/smbus/smbus.c @@ -77,6 +77,7 @@ static struct device_operations smbus_ops = { static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_APL_SMBUS, PCI_DEVICE_ID_INTEL_CNL_SMBUS, + PCI_DEVICE_ID_INTEL_CNP_H_SMBUS, PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS, PCI_DEVICE_ID_INTEL_SPT_H_SMBUS, PCI_DEVICE_ID_INTEL_LWB_SMBUS_SUPER,