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{arch,cpu,drivers,ec}: Don't hide pointers behind typedefs 

Change-Id: Id88bb4367d6045f6fbf185f0562ac72c04ee5f84
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: http://review.coreboot.org/7146
Tested-by: build bot (Jenkins)
This commit is contained in:
Edward O'Callaghan 2014-10-27 23:29:29 +11:00
parent 06413ff513
commit 2c9d2cf75c
72 changed files with 159 additions and 157 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/arch/x86/boot/acpi.c
View File

@ -141,7 +141,7 @@ int acpi_create_madt_lapic(acpi_madt_lapic_t *lapic, u8 cpu, u8 apic)
unsigned long acpi_create_madt_lapics(unsigned long current)
{
device_t cpu;
struct device *cpu;
int index = 0;
for (cpu = all_devices; cpu; cpu = cpu->next) {
@ -278,7 +278,7 @@ void acpi_create_ssdt_generator(acpi_header_t *ssdt, const char *oem_table_id)
acpigen_set_current((char *) current);
{
#if IS_ENABLED(CONFIG_PER_DEVICE_ACPI_TABLES)
device_t dev;
struct device *dev;
for (dev = all_devices; dev; dev = dev->next)
if (dev->ops && dev->ops->acpi_fill_ssdt_generator) {
dev->ops->acpi_fill_ssdt_generator();
@ -708,7 +708,7 @@ unsigned long write_acpi_tables(unsigned long start)
acpi_header_t *dsdt;
acpi_mcfg_t *mcfg;
acpi_madt_t *madt;
device_t dev;
struct device *dev;
current = start;

6
src/arch/x86/boot/mpspec.c
View File

@ -166,7 +166,7 @@ void smp_write_processors(struct mp_config_table *mc)
unsigned cpu_features;
unsigned cpu_feature_flags;
struct cpuid_result result;
device_t cpu;
struct device *cpu;
boot_apic_id = lapicid();
apic_version = lapic_read(LAPIC_LVR) & 0xff;
@ -493,7 +493,9 @@ unsigned long __attribute__((weak)) write_smp_table(unsigned long addr)
struct drivers_generic_ioapic_config *ioapic_config;
struct mp_config_table *mc;
int isa_bus, pin, parentpin;
device_t dev, parent, oldparent;
struct device *dev;
struct device *parent;
struct device *oldparent;
void *tmp, *v;
int isaioapic = -1, have_fixed_entries;

6
src/arch/x86/boot/smbios.c
View File

@ -303,7 +303,7 @@ static int smbios_write_type11(unsigned long *current, int *handle)
{
struct smbios_type11 *t = (struct smbios_type11 *)*current;
int len;
device_t dev;
struct device *dev;
memset(t, 0, sizeof *t);
t->type = SMBIOS_OEM_STRINGS;
@ -379,9 +379,9 @@ static int smbios_write_type127(unsigned long *current, int handle)
return len;
}
static int smbios_walk_device_tree(device_t tree, int *handle, unsigned long *current)
static int smbios_walk_device_tree(struct device *tree, int *handle, unsigned long *current)
{
device_t dev;
struct device *dev;
int len = 0;
for(dev = tree; dev; dev = dev->next) {

8
src/cpu/allwinner/a10/cpu.c
View File

@ -11,7 +11,7 @@
#include <cbmem.h>
static void cpu_enable_resources(device_t dev)
static void cpu_enable_resources(struct device *dev)
{
ram_resource(dev, 0, CONFIG_SYS_SDRAM_BASE >> 10,
CONFIG_DRAM_SIZE_MB << 10);
@ -20,12 +20,12 @@ static void cpu_enable_resources(device_t dev)
*/
}
static void cpu_init(device_t dev)
static void cpu_init(struct device *dev)
{
/* TODO: Check if anything else needs to be explicitly initialized */
}
static void cpu_noop(device_t dev)
static void cpu_noop(struct device *dev)
{
}
@ -37,7 +37,7 @@ static struct device_operations cpu_ops = {
.scan_bus = NULL,
};
static void a1x_cpu_enable_dev(device_t dev)
static void a1x_cpu_enable_dev(struct device *dev)
{
dev->ops = &cpu_ops;
}

2
src/cpu/intel/ep80579/ep80579_init.c
View File

@ -28,7 +28,7 @@
#include <cpu/x86/cache.h>
#include <cpu/x86/mtrr.h>
static void ep80579_init(device_t dev)
static void ep80579_init(struct device *dev)
{
/* Turn on caching if we haven't already */
x86_enable_cache();

2
src/cpu/intel/fsp_model_206ax/acpi.c
View File

@ -89,7 +89,7 @@ static int generate_C_state_entries(void)
struct cpu_info *info;
struct cpu_driver *cpu;
int len, lenif;
device_t lapic;
struct device *lapic;
struct cpu_intel_fsp_model_206ax_config *conf = NULL;
/* Find the SpeedStep CPU in the device tree using magic APIC ID */

6
src/cpu/intel/fsp_model_206ax/model_206ax_init.c
View File

@ -290,7 +290,7 @@ static void configure_mca(void)
/*
* Initialize any extra cores/threads in this package.
*/
static void intel_cores_init(device_t cpu)
static void intel_cores_init(struct device *cpu)
{
struct cpuid_result result;
unsigned threads_per_package, threads_per_core, i;
@ -313,7 +313,7 @@ static void intel_cores_init(device_t cpu)
for (i = 1; i < threads_per_package; ++i) {
struct device_path cpu_path;
device_t new;
struct device *new;
/* Build the cpu device path */
cpu_path.type = DEVICE_PATH_APIC;
@ -344,7 +344,7 @@ static void intel_cores_init(device_t cpu)
}
}
static void model_206ax_init(device_t cpu)
static void model_206ax_init(struct device *cpu)
{
char processor_name[49];
struct cpuid_result cpuid_regs;

2
src/cpu/intel/fsp_model_406dx/acpi.c
View File

@ -55,7 +55,7 @@ static int generate_C_state_entries(void)
struct cpu_info *info;
struct cpu_driver *cpu;
int len, lenif;
device_t lapic;
struct device *lapic;
struct cpu_intel_model_406dx_config *conf = NULL;
/* Find the SpeedStep CPU in the device tree using magic APIC ID */

6
src/cpu/intel/fsp_model_406dx/model_406dx_init.c
View File

@ -112,7 +112,7 @@ static void configure_mca(void)
/*
* Initialize any extra cores/threads in this package.
*/
static void intel_cores_init(device_t cpu)
static void intel_cores_init(struct device *cpu)
{
struct cpuid_result result;
unsigned threads_per_package, threads_per_core, i;
@ -135,7 +135,7 @@ static void intel_cores_init(device_t cpu)
for (i = 1; i < threads_per_package; ++i) {
struct device_path cpu_path;
device_t new;
struct device *new;
/* Build the cpu device path */
cpu_path.type = DEVICE_PATH_APIC;
@ -166,7 +166,7 @@ static void intel_cores_init(device_t cpu)
}
}
static void model_406dx_init(device_t cpu)
static void model_406dx_init(struct device *cpu)
{
char processor_name[49];

2
src/cpu/intel/haswell/acpi.c
View File

@ -91,7 +91,7 @@ static int generate_C_state_entries(void)
struct cpu_info *info;
struct cpu_driver *cpu;
int len, lenif;
device_t lapic;
struct device *lapic;
struct cpu_intel_haswell_config *conf = NULL;
/* Find the SpeedStep CPU in the device tree using magic APIC ID */

4
src/cpu/intel/haswell/haswell_init.c
View File

@ -597,7 +597,7 @@ static void configure_c_states(void)
static void configure_thermal_target(void)
{
struct cpu_intel_haswell_config *conf;
device_t lapic;
struct device *lapic;
msr_t msr;
/* Find pointer to CPU configuration */
@ -735,7 +735,7 @@ static void bsp_init_before_ap_bringup(struct bus *cpu_bus)
}
/* All CPUs including BSP will run the following function. */
static void haswell_init(device_t cpu)
static void haswell_init(struct device *cpu)
{
/* Clear out pending MCEs */
configure_mca();

6
src/cpu/intel/haswell/smmrelocate.c
View File

@ -227,7 +227,7 @@ static void asmlinkage cpu_smm_do_relocation(void *arg)
}
}
static u32 northbridge_get_base_reg(device_t dev, int reg)
static u32 northbridge_get_base_reg(struct device *dev, int reg)
{
u32 value;
@ -237,7 +237,7 @@ static u32 northbridge_get_base_reg(device_t dev, int reg)
return value;
}
static void fill_in_relocation_params(device_t dev,
static void fill_in_relocation_params(struct device *dev,
struct smm_relocation_params *params)
{
u32 tseg_size;
@ -387,7 +387,7 @@ static int install_permanent_handler(int num_cpus,
static int cpu_smm_setup(void)
{
device_t dev;
struct device *dev;
int num_cpus;
msr_t msr;

4
src/cpu/intel/hyperthreading/intel_sibling.c
View File

@ -38,7 +38,7 @@ int intel_ht_sibling(void)
return !!(lapicid() & (threads-1));
}
void intel_sibling_init(device_t cpu)
void intel_sibling_init(struct device *cpu)
{
unsigned i, siblings;
struct cpuid_result result;
@ -74,7 +74,7 @@ void intel_sibling_init(device_t cpu)
/* I am the primary cpu start up my siblings */
for(i = 1; i < siblings; i++) {
struct device_path cpu_path;
device_t new;
struct device *new;
/* Build the cpu device path */
cpu_path.type = DEVICE_PATH_APIC;
cpu_path.apic.apic_id = cpu->path.apic.apic_id + i;

6
src/cpu/intel/model_1067x/model_1067x_init.c
View File

@ -86,7 +86,7 @@ static void configure_c_states(const int quad)
msr_t msr;
/* Find pointer to CPU configuration. */
const device_t lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC);
const struct device *lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC);
const struct cpu_intel_model_1067x_config *const conf =
(lapic && lapic->chip_info) ? lapic->chip_info : NULL;
@ -144,7 +144,7 @@ static void configure_p_states(const char stepping, const char cores)
msr_t msr;
/* Find pointer to CPU configuration. */
const device_t lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC);
const struct device *lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC);
struct cpu_intel_model_1067x_config *const conf =
(lapic && lapic->chip_info) ? lapic->chip_info : NULL;
@ -285,7 +285,7 @@ static void configure_pic_thermal_sensors(const int tm2, const int quad)
wrmsr(PIC_SENS_CFG, msr);
}
static void model_1067x_init(device_t cpu)
static void model_1067x_init(struct device *cpu)
{
char processor_name[49];

2
src/cpu/intel/model_106cx/model_106cx_init.c
View File

@ -110,7 +110,7 @@ static void configure_misc(void)
wrmsr(IA32_MISC_ENABLE, msr);
}
static void model_106cx_init(device_t cpu)
static void model_106cx_init(struct device *cpu)
{
char processor_name[49];

2
src/cpu/intel/model_2065x/acpi.c
View File

@ -89,7 +89,7 @@ static int generate_C_state_entries(void)
struct cpu_info *info;
struct cpu_driver *cpu;
int len, lenif;
device_t lapic;
struct device *lapic;
struct cpu_intel_model_2065x_config *conf = NULL;
/* Find the SpeedStep CPU in the device tree using magic APIC ID */

8
src/cpu/intel/model_2065x/model_2065x_init.c
View File

@ -182,7 +182,7 @@ int cpu_config_tdp_levels(void)
static void configure_thermal_target(void)
{
struct cpu_intel_model_2065x_config *conf;
device_t lapic;
struct device *lapic;
msr_t msr;
/* Find pointer to CPU configuration */
@ -286,7 +286,7 @@ static void configure_mca(void)
/*
* Initialize any extra cores/threads in this package.
*/
static void intel_cores_init(device_t cpu)
static void intel_cores_init(struct device *cpu)
{
struct cpuid_result result;
unsigned threads_per_package, threads_per_core, i;
@ -309,7 +309,7 @@ static void intel_cores_init(device_t cpu)
for (i = 1; i < threads_per_package; ++i) {
struct device_path cpu_path;
device_t new;
struct device *new;
/* Build the cpu device path */
cpu_path.type = DEVICE_PATH_APIC;
@ -337,7 +337,7 @@ static void intel_cores_init(device_t cpu)
}
}
static void model_2065x_init(device_t cpu)
static void model_2065x_init(struct device *cpu)
{
char processor_name[49];
struct cpuid_result cpuid_regs;

2
src/cpu/intel/model_206ax/acpi.c
View File

@ -89,7 +89,7 @@ static int generate_C_state_entries(void)
struct cpu_info *info;
struct cpu_driver *cpu;
int len, lenif;
device_t lapic;
struct device *lapic;
struct cpu_intel_model_206ax_config *conf = NULL;
/* Find the SpeedStep CPU in the device tree using magic APIC ID */

8
src/cpu/intel/model_206ax/model_206ax_init.c
View File

@ -364,7 +364,7 @@ static void configure_c_states(void)
static void configure_thermal_target(void)
{
struct cpu_intel_model_206ax_config *conf;
device_t lapic;
struct device *lapic;
msr_t msr;
/* Find pointer to CPU configuration */
@ -477,7 +477,7 @@ static void configure_mca(void)
/*
* Initialize any extra cores/threads in this package.
*/
static void intel_cores_init(device_t cpu)
static void intel_cores_init(struct device *cpu)
{
struct cpuid_result result;
unsigned threads_per_package, threads_per_core, i;
@ -500,7 +500,7 @@ static void intel_cores_init(device_t cpu)
for (i = 1; i < threads_per_package; ++i) {
struct device_path cpu_path;
device_t new;
struct device *new;
/* Build the cpu device path */
cpu_path.type = DEVICE_PATH_APIC;
@ -531,7 +531,7 @@ static void intel_cores_init(device_t cpu)
}
}
static void model_206ax_init(device_t cpu)
static void model_206ax_init(struct device *cpu)
{
char processor_name[49];
struct cpuid_result cpuid_regs;

2
src/cpu/intel/model_65x/model_65x_init.c
View File

@ -28,7 +28,7 @@
#include <cpu/x86/cache.h>
#include <cpu/intel/l2_cache.h>
static void model_65x_init(device_t dev)
static void model_65x_init(struct device *dev)
{
/* Update the microcode */
intel_update_microcode_from_cbfs();

2
src/cpu/intel/model_67x/model_67x_init.c
View File

@ -29,7 +29,7 @@
#include <cpu/x86/msr.h>
#include <cpu/intel/l2_cache.h>
static void model_67x_init(device_t cpu)
static void model_67x_init(struct device *cpu)
{
/* Update the microcode */
intel_update_microcode_from_cbfs();

2
src/cpu/intel/model_68x/model_68x_init.c
View File

@ -31,7 +31,7 @@
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
static void model_68x_init(device_t cpu)
static void model_68x_init(struct device *cpu)
{
char processor_name[49];

2
src/cpu/intel/model_69x/model_69x_init.c
View File

@ -8,7 +8,7 @@
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
static void model_69x_init(device_t dev)
static void model_69x_init(struct device *dev)
{
/* Turn on caching if we haven't already */
x86_enable_cache();

2
src/cpu/intel/model_6bx/model_6bx_init.c
View File

@ -31,7 +31,7 @@
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
static void model_6bx_init(device_t cpu)
static void model_6bx_init(struct device *cpu)
{
char processor_name[49];

2
src/cpu/intel/model_6dx/model_6dx_init.c
View File

@ -8,7 +8,7 @@
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
static void model_6dx_init(device_t dev)
static void model_6dx_init(struct device *dev)
{
/* Turn on caching if we haven't already */
x86_enable_cache();

2
src/cpu/intel/model_6ex/model_6ex_init.c
View File

@ -141,7 +141,7 @@ static void configure_pic_thermal_sensors(void)
wrmsr(PIC_SENS_CFG, msr);
}
static void model_6ex_init(device_t cpu)
static void model_6ex_init(struct device *cpu)
{
char processor_name[49];

2
src/cpu/intel/model_6fx/model_6fx_init.c
View File

@ -161,7 +161,7 @@ static void configure_pic_thermal_sensors(void)
wrmsr(PIC_SENS_CFG, msr);
}
static void model_6fx_init(device_t cpu)
static void model_6fx_init(struct device *cpu)
{
char processor_name[49];

2
src/cpu/intel/model_6xx/model_6xx_init.c
View File

@ -8,7 +8,7 @@
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
static void model_6xx_init(device_t dev)
static void model_6xx_init(struct device *dev)
{
/* Turn on caching if we haven't already */
x86_enable_cache();

2
src/cpu/intel/model_f0x/model_f0x_init.c
View File

@ -8,7 +8,7 @@
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
static void model_f0x_init(device_t dev)
static void model_f0x_init(struct device *dev)
{
/* Turn on caching if we haven't already */
x86_enable_cache();

2
src/cpu/intel/model_f1x/model_f1x_init.c
View File

@ -8,7 +8,7 @@
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
static void model_f1x_init(device_t dev)
static void model_f1x_init(struct device *dev)
{
/* Turn on caching if we haven't already */
x86_enable_cache();

2
src/cpu/intel/model_f2x/model_f2x_init.c
View File

@ -9,7 +9,7 @@
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
static void model_f2x_init(device_t cpu)
static void model_f2x_init(struct device *cpu)
{
/* Turn on caching if we haven't already */
x86_enable_cache();

2
src/cpu/intel/model_f3x/model_f3x_init.c
View File

@ -9,7 +9,7 @@
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
static void model_f3x_init(device_t cpu)
static void model_f3x_init(struct device *cpu)
{
/* Turn on caching if we haven't already */
x86_enable_cache();

2
src/cpu/intel/model_f4x/model_f4x_init.c
View File

@ -9,7 +9,7 @@
#include <cpu/intel/hyperthreading.h>
#include <cpu/x86/cache.h>
static void model_f4x_init(device_t cpu)
static void model_f4x_init(struct device *cpu)
{
/* Turn on caching if we haven't already */
x86_enable_cache();

2
src/cpu/intel/speedstep/acpi.c
View File

@ -44,7 +44,7 @@ int __attribute__((weak)) get_cst_entries(acpi_cstate_t **entries
static int determine_total_number_of_cores(void)
{
device_t cpu;
struct device *cpu;
int count = 0;
for(cpu = all_devices; cpu; cpu = cpu->next) {
if ((cpu->path.type != DEVICE_PATH_APIC) ||

2
src/cpu/via/c3/c3_init.c
View File

@ -26,7 +26,7 @@
#include <cpu/x86/lapic.h>
#include <cpu/x86/cache.h>
static void c3_init(device_t dev)
static void c3_init(struct device *dev)
{
x86_enable_cache();
x86_setup_mtrrs();

2
src/cpu/via/c7/c7_init.c
View File

@ -147,7 +147,7 @@ static void set_c7_speed(int model) {
printk(BIOS_INFO, "Current CPU multiplier: %dx\n", (int)((msr.lo >> 8) & 0xff));
}
static void c7_init(device_t dev)
static void c7_init(struct device *dev)
{
u8 brand;
struct cpuinfo_x86 c;

2
src/cpu/via/nano/nano_init.c
View File

@ -139,7 +139,7 @@ static void nano_power(void)
wrmsr(MSR_IA32_MISC_ENABLE, msr);
}
static void nano_init(device_t dev)
static void nano_init(struct device *dev)
{
struct cpuinfo_x86 c;

8
src/cpu/x86/lapic/lapic_cpu_init.c
View File

@ -253,7 +253,7 @@ static void *stacks[CONFIG_MAX_CPUS];
volatile unsigned long secondary_stack;
volatile unsigned int secondary_cpu_index;
int start_cpu(device_t cpu)
int start_cpu(struct device *cpu)
{
struct cpu_info *info;
unsigned long stack_end;
@ -430,9 +430,9 @@ void asmlinkage secondary_cpu_init(unsigned int index)
stop_this_cpu();
}
static void start_other_cpus(struct bus *cpu_bus, device_t bsp_cpu)
static void start_other_cpus(struct bus *cpu_bus, struct device *bsp_cpu)
{
device_t cpu;
struct device *cpu;
/* Loop through the cpus once getting them started */
for(cpu = cpu_bus->children; cpu ; cpu = cpu->sibling) {
@ -465,7 +465,7 @@ static void start_other_cpus(struct bus *cpu_bus, device_t bsp_cpu)
static void wait_other_cpus_stop(struct bus *cpu_bus)
{
device_t cpu;
struct device *cpu;
int old_active_count, active_count;
long loopcount = 0;
int i;

4
src/cpu/x86/mp_init.c
View File

@ -86,7 +86,7 @@ struct mp_flight_plan {
static struct mp_flight_plan mp_info;
struct cpu_map {
device_t dev;
struct device *dev;
int apic_id;
};
@ -328,7 +328,7 @@ static int allocate_cpu_devices(struct bus *cpu_bus, struct mp_params *p)
info = cpu_info();
for (i = 1; i < max_cpus; i++) {
struct device_path cpu_path;
device_t new;
struct device *new;
int apic_id;
/* Build the cpu device path */

2
src/drivers/ati/ragexl/xlinit.c
View File

@ -489,7 +489,7 @@ static void aty_calc_mem_refresh(struct fb_info_aty *info, u16 id, int xclk)
info->mem_refresh_rate = i;
}
#endif /*CONFIG_CONSOLE_BTEXT */
static void ati_ragexl_init(device_t dev)
static void ati_ragexl_init(struct device *dev)
{
u32 chip_id;
int j;

2
src/drivers/dec/21143/21143.c
View File

@ -24,7 +24,7 @@
#include <device/pci_ids.h>
#include <console/console.h>
static void dec_21143_enable(device_t dev)
static void dec_21143_enable(struct device *dev)
{
printk(BIOS_DEBUG, "Initializing DECchip 21143\n");

2
src/drivers/emulation/qemu/bochs.c
View File

@ -58,7 +58,7 @@ static int bochs_read(int index)
}
#endif
static void bochs_init(device_t dev)
static void bochs_init(struct device *dev)
{
#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)
struct edid edid;

2
src/drivers/emulation/qemu/cirrus.c
View File

@ -212,7 +212,7 @@ write_hidden_dac (uint8_t data)
}
#endif
static void cirrus_init(device_t dev)
static void cirrus_init(struct device *dev)
{
#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)
uint8_t cr_ext, cr_overlay;

8
src/drivers/generic/ioapic/ioapic.c
View File

@ -12,7 +12,7 @@
#include <arch/io.h>
#include <cpu/x86/lapic.h>
static void ioapic_init(device_t dev)
static void ioapic_init(struct device *dev)
{
struct drivers_generic_ioapic_config *config = dev->chip_info;
u32 bsp_lapicid = lapicid();
@ -86,15 +86,15 @@ static void ioapic_init(device_t dev)
}
}
static void ioapic_enable_resources(device_t dev)
static void ioapic_enable_resources(struct device *dev)
{
}
static void ioapic_nop(device_t dummy)
static void ioapic_nop(struct device *dummy)
{
}
static void ioapic_read_resources(device_t dev)
static void ioapic_read_resources(struct device *dev)
{
struct drivers_generic_ioapic_config *config = (struct drivers_generic_ioapic_config *)dev->chip_info;
struct resource *res;

6
src/drivers/i2c/adm1026/adm1026.c
View File

@ -19,7 +19,7 @@
#define ADM1026_REG_CONFIG2 0x01
#define ADM1026_REG_CONFIG3 0x07
static void adm1026_enable_monitoring(device_t dev)
static void adm1026_enable_monitoring(struct device *dev)
{
int result;
result = smbus_read_byte(dev, ADM1026_REG_CONFIG1);
@ -33,7 +33,7 @@ static void adm1026_enable_monitoring(device_t dev)
}
}
static void adm1026_init(device_t dev)
static void adm1026_init(struct device *dev)
{
if (dev->enabled && dev->path.type == DEVICE_PATH_I2C) {
if (ops_smbus_bus(get_pbus_smbus(dev))) {
@ -44,7 +44,7 @@ static void adm1026_init(device_t dev)
}
}
static void adm1026_noop(device_t dummy)
static void adm1026_noop(struct device *dummy)
{
}

6
src/drivers/i2c/adm1027/adm1027.c
View File

@ -18,7 +18,7 @@
#define ADM1027_REG_CONFIG2 0x73
#define ADM1027_REG_CONFIG3 0x78
static void adm1027_enable_monitoring(device_t dev)
static void adm1027_enable_monitoring(struct device *dev)
{
int result;
@ -39,7 +39,7 @@ static void adm1027_enable_monitoring(device_t dev)
printk(BIOS_DEBUG, "ADM1027: monitoring enabled\n");
}
static void adm1027_init(device_t dev)
static void adm1027_init(struct device *dev)
{
if (dev->enabled && dev->path.type == DEVICE_PATH_I2C) {
if (ops_smbus_bus(get_pbus_smbus(dev))) {
@ -50,7 +50,7 @@ static void adm1027_init(device_t dev)
}
}
static void adm1027_noop(device_t dummy)
static void adm1027_noop(struct device *dummy)
{
}

4
src/drivers/i2c/adt7463/adt7463.c
View File

@ -32,7 +32,7 @@
* See Analog Devices ADT7463 datasheet, Rev C (2004):
* http://www.analog.com/en/prod/0,,766_825_ADT7463,00.html
*/
static void adt7463_init(device_t adt7463)
static void adt7463_init(struct device *adt7463)
{
int result;
@ -85,7 +85,7 @@ static void adt7463_init(device_t adt7463)
printk(BIOS_DEBUG, "ADT7463 properly initialized\n");
}
static void adt7463_noop(device_t dummy)
static void adt7463_noop(struct device *dummy)
{
}

6
src/drivers/i2c/at24rf08c/at24rf08c.c
View File

@ -25,7 +25,7 @@
#include <smbios.h>
#include <console/console.h>
static void at24rf08c_init(device_t dev)
static void at24rf08c_init(struct device *dev)
{
int i, j;
@ -52,7 +52,7 @@ static void at24rf08c_init(device_t dev)
printk (BIOS_DEBUG, "init EEPROM done\n");
}
static void at24rf08c_noop(device_t dummy)
static void at24rf08c_noop(struct device *dummy)
{
}
@ -63,7 +63,7 @@ static struct device_operations at24rf08c_operations = {
.init = at24rf08c_init,
};
static void enable_dev(device_t dev)
static void enable_dev(struct device *dev)
{
dev->ops = &at24rf08c_operations;
}

14
src/drivers/i2c/at24rf08c/lenovo_serials.c
View File

@ -28,16 +28,16 @@
#define ERROR_STRING "*INVALID*"
static device_t at24rf08c_find_bank(u8 bank)
static struct device *at24rf08c_find_bank(u8 bank)
{
device_t dev;
struct device *dev;
dev = dev_find_slot_on_smbus(1, 0x54 | bank);
if (!dev)
printk(BIOS_WARNING, "EEPROM not found\n");
return dev;
}
static int at24rf08c_read_byte(device_t dev, u8 addr)
static int at24rf08c_read_byte(struct device *dev, u8 addr)
{
int t = -1;
int j;
@ -54,7 +54,7 @@ static int at24rf08c_read_byte(device_t dev, u8 addr)
return t;
}
static void at24rf08c_read_string_dev(device_t dev, u8 start,
static void at24rf08c_read_string_dev(struct device *dev, u8 start,
u8 len, char *result)
{
int i;
@ -72,7 +72,7 @@ static void at24rf08c_read_string_dev(device_t dev, u8 start,
static void at24rf08c_read_string(u8 bank, u8 start, u8 len, char *result)
{
device_t dev;
struct device *dev;
dev = at24rf08c_find_bank(bank);
if (dev == 0) {
@ -124,7 +124,7 @@ void smbios_mainboard_set_uuid(u8 *uuid)
static char result[16];
unsigned i;
static int already_read;
device_t dev;
struct device *dev;
const int remap[16] = {
/* UUID byteswap. */
3, 2, 1, 0, 5, 4, 7, 6, 8, 9, 10, 11, 12, 13, 14, 15
@ -173,7 +173,7 @@ const char *smbios_mainboard_version(void)
{
static char result[100];
static int already_read;
device_t dev;
struct device *dev;
int len;
if (already_read)

4
src/drivers/i2c/i2cmux/i2cmux.c
View File

@ -6,7 +6,7 @@
#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
static void i2cmux_set_link(device_t dev, unsigned int link)
static void i2cmux_set_link(struct device *dev, unsigned int link)
{
if (dev->enabled && dev->path.type == DEVICE_PATH_I2C) {
if (ops_smbus_bus(get_pbus_smbus(dev))) {
@ -16,7 +16,7 @@ static void i2cmux_set_link(device_t dev, unsigned int link)
}
}
static void i2cmux_noop(device_t dummy)
static void i2cmux_noop(struct device *dummy)
{
}

4
src/drivers/i2c/i2cmux2/i2cmux2.c
View File

@ -6,7 +6,7 @@
#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
static void i2cmux2_set_link(device_t dev, unsigned int link)
static void i2cmux2_set_link(struct device *dev, unsigned int link)
{
if (dev->enabled && dev->path.type == DEVICE_PATH_I2C) {
if (ops_smbus_bus(get_pbus_smbus(dev))) {
@ -15,7 +15,7 @@ static void i2cmux2_set_link(device_t dev, unsigned int link)
}
}
static void i2cmux2_noop(device_t dummy)
static void i2cmux2_noop(struct device *dummy)
{
}

4
src/drivers/i2c/lm63/lm63.c
View File

@ -6,7 +6,7 @@
#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
static void lm63_init(device_t dev)
static void lm63_init(struct device *dev)
{
int result;
if (dev->enabled && dev->path.type == DEVICE_PATH_I2C) {
@ -21,7 +21,7 @@ static void lm63_init(device_t dev)
}
}
static void lm63_noop(device_t dummy)
static void lm63_noop(struct device *dummy)
{
}

24
src/drivers/i2c/rtd2132/rtd2132.c
View File

@ -75,7 +75,7 @@
#define RTD2132_DEBUG_REG 0
static void rtd2132_write_reg(device_t dev, u8 reg, u8 value)
static void rtd2132_write_reg(struct device *dev, u8 reg, u8 value)
{
if (RTD2132_DEBUG_REG)
printk(BIOS_DEBUG, "RTD2132 0x%02x <- 0x%02x\n", reg, value);
@ -83,18 +83,18 @@ static void rtd2132_write_reg(device_t dev, u8 reg, u8 value)
smbus_write_byte(dev, RTD2132_DATA, value);
}
static void rtd2132_firmware_stop(device_t dev)
static void rtd2132_firmware_stop(struct device *dev)
{
smbus_write_byte(dev, RTD2132_FIRMWARE, RTD2132_FIRMWARE_STOP);
mdelay(60);
}
static void rtd2132_firmware_start(device_t dev)
static void rtd2132_firmware_start(struct device *dev)
{
smbus_write_byte(dev, RTD2132_FIRMWARE, RTD2132_FIRMWARE_START);
}
static void rtd2132_pps(device_t dev, struct drivers_i2c_rtd2132_config *cfg)
static void rtd2132_pps(struct device *dev, struct drivers_i2c_rtd2132_config *cfg)
{
/* T2, T5, and T7 register values are in units of 4ms. */
rtd2132_write_reg(dev, RTD2132_COMMAND_PWR_SEQ_T1, cfg->t1);
@ -106,7 +106,7 @@ static void rtd2132_pps(device_t dev, struct drivers_i2c_rtd2132_config *cfg)
rtd2132_write_reg(dev, RTD2132_COMMAND_PWR_SEQ_T7, cfg->t7 / 4);
}
static void rtd2132_sscg_enable(device_t dev, u8 sscg_percent)
static void rtd2132_sscg_enable(struct device *dev, u8 sscg_percent)
{
/* SSCG_Config_0 */
rtd2132_write_reg(dev, RTD2132_COMMAND_SSCG_CONFIG_0,
@ -116,7 +116,7 @@ static void rtd2132_sscg_enable(device_t dev, u8 sscg_percent)
rtd2132_write_reg(dev, RTD2132_COMMAND_SSCG_CONFIG_1, sscg_percent);
}
static void rtd2132_sscg_disable(device_t dev)
static void rtd2132_sscg_disable(struct device *dev)
{
/* SSCG_Config_0 */
rtd2132_write_reg(dev, RTD2132_COMMAND_SSCG_CONFIG_0,
@ -127,7 +127,7 @@ static void rtd2132_sscg_disable(device_t dev)
RTD2132_SSCG_CONFIG_DISABLED);
}
static void rtd2132_sscg(device_t dev, struct drivers_i2c_rtd2132_config *cfg)
static void rtd2132_sscg(struct device *dev, struct drivers_i2c_rtd2132_config *cfg)
{
switch (cfg->sscg_percent) {
case RTD2132_SSCG_PERCENT_0_0:
@ -152,7 +152,7 @@ static void rtd2132_sscg(device_t dev, struct drivers_i2c_rtd2132_config *cfg)
}
}
static void rtd2132_lvds_swap(device_t dev,
static void rtd2132_lvds_swap(struct device *dev,
struct drivers_i2c_rtd2132_config *cfg)
{
u8 swap_value = RTD2132_LVDS_SWAP_NORMAL;
@ -186,7 +186,7 @@ static void rtd2132_lvds_swap(device_t dev,
rtd2132_write_reg(dev, RTD2132_COMMAND_LVDS_SWAP, swap_value);
}
static void rtd2132_defaults(device_t dev)
static void rtd2132_defaults(struct device *dev)
{
static const struct def_setting {
u8 reg;
@ -207,7 +207,7 @@ static void rtd2132_defaults(device_t dev)
def_settings[i].value);
}
static void rtd2132_setup(device_t dev)
static void rtd2132_setup(struct device *dev)
{
struct drivers_i2c_rtd2132_config *config = dev->chip_info;
@ -233,7 +233,7 @@ static void rtd2132_setup(device_t dev)
rtd2132_firmware_start(dev);
}
static void rtd2132_init(device_t dev)
static void rtd2132_init(struct device *dev)
{
if (dev->enabled && dev->path.type == DEVICE_PATH_I2C &&
ops_smbus_bus(get_pbus_smbus(dev))) {
@ -241,7 +241,7 @@ static void rtd2132_init(device_t dev)
}
}
static void rtd2132_noop(device_t dummy)
static void rtd2132_noop(struct device *dummy)
{
}

18
src/drivers/i2c/w83793/w83793.c
View File

@ -25,18 +25,18 @@
#include <device/smbus.h>
#include "chip.h"
static int w83793_fan_limit(device_t dev, int fan, uint16_t limit)
static int w83793_fan_limit(struct device *dev, int fan, uint16_t limit)
{
return smbus_write_byte(dev, 0x90 + fan * 2, limit >> 8) ||
smbus_write_byte(dev, 0x91 + fan * 2, limit & 0xff);
}
static int w83793_bank(device_t dev, int bank)
static int w83793_bank(struct device *dev, int bank)
{
return smbus_write_byte(dev, 0, bank);
}
static int w83793_td_level(device_t dev, int fan, const char *level)
static int w83793_td_level(struct device *dev, int fan, const char *level)
{
fan *= 0x10;
@ -50,7 +50,7 @@ static int w83793_td_level(device_t dev, int fan, const char *level)
return 0;
}
static int w83793_tr_level(device_t dev, int fan, const char *level)
static int w83793_tr_level(struct device *dev, int fan, const char *level)
{
fan *= 0x10;
@ -65,7 +65,7 @@ static int w83793_tr_level(device_t dev, int fan, const char *level)
}
static int w83793_td_fan_level(device_t dev, int fan, const char *level)
static int w83793_td_fan_level(struct device *dev, int fan, const char *level)
{
fan *= 0x10;
@ -79,7 +79,7 @@ static int w83793_td_fan_level(device_t dev, int fan, const char *level)
return 0;
}
static int w83793_tr_fan_level(device_t dev, int fan, const char *level)
static int w83793_tr_fan_level(struct device *dev, int fan, const char *level)
{
fan *= 0x10;
@ -94,7 +94,7 @@ static int w83793_tr_fan_level(device_t dev, int fan, const char *level)
}
static void w83793_init(device_t dev)
static void w83793_init(struct device *dev)
{
struct drivers_i2c_w83793_config *config = dev->chip_info;
uint16_t id;
@ -220,7 +220,7 @@ static void w83793_init(device_t dev)
}
static void w83793_noop(device_t dummy)
static void w83793_noop(struct device *dummy)
{
}
@ -231,7 +231,7 @@ static struct device_operations w83793_operations = {
.init = w83793_init,
};
static void enable_dev(device_t dev)
static void enable_dev(struct device *dev)
{
dev->ops = &w83793_operations;
}

6
src/drivers/i2c/w83795/w83795.c
View File

@ -221,7 +221,7 @@ static void w83795_init(w83795_fan_mode_t mode, u8 dts_src)
}
}
static void w83795_hwm_init(device_t dev)
static void w83795_hwm_init(struct device *dev)
{
struct device *cpu;
struct cpu_info *info;
@ -239,7 +239,7 @@ static void w83795_hwm_init(device_t dev)
printk(BIOS_ERR, "Neither AMD nor INTEL CPU detected\n");
}
static void w83795_noop(device_t dummy)
static void w83795_noop(struct device *dummy)
{
}
@ -250,7 +250,7 @@ static struct device_operations w83795_operations = {
.init = w83795_hwm_init,
};
static void enable_dev(device_t dev)
static void enable_dev(struct device *dev)
{
dev->ops = &w83795_operations;
}

4
src/drivers/ics/954309/ics954309.c
View File

@ -29,7 +29,7 @@
#include "chip.h"
#include <string.h>
static void ics954309_init(device_t dev)
static void ics954309_init(struct device *dev)
{
struct drivers_ics_954309_config *config;
u8 initdata[12];
@ -55,7 +55,7 @@ static void ics954309_init(device_t dev)
smbus_block_write(dev, 0, 12, initdata);
}
static void ics954309_noop(device_t dummy)
static void ics954309_noop(struct device *dummy)
{
}

8
src/ec/compal/ene932/ec.c
View File

@ -132,7 +132,7 @@ static u8 ec_io_read(u16 addr)
*/
#ifndef __SMM__
static void ene932_init(device_t dev)
static void ene932_init(struct device *dev)
{
if (!dev->enabled)
return;
@ -143,13 +143,13 @@ static void ene932_init(device_t dev)
}
static void ene932_read_resources(device_t dev)
static void ene932_read_resources(struct device *dev)
{
/* This function avoids an error on serial console. */
}
static void ene932_enable_resources(device_t dev)
static void ene932_enable_resources(struct device *dev)
{
/* This function avoids an error on serial console. */
}
@ -164,7 +164,7 @@ static struct pnp_info pnp_dev_info[] = {
{ &ops, 0, 0, { 0, 0 }, }
};
static void enable_dev(device_t dev)
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info),
pnp_dev_info);

8
src/ec/google/chromeec/ec_lpc.c
View File

@ -137,7 +137,7 @@ int google_chromeec_command(struct chromeec_command *cec_command)
#ifndef __PRE_RAM__
#ifndef __SMM__
static void lpc_ec_init(device_t dev)
static void lpc_ec_init(struct device *dev)
{
if (!dev->enabled)
return;
@ -146,12 +146,12 @@ static void lpc_ec_init(device_t dev)
google_chromeec_init();
}
static void lpc_ec_read_resources(device_t dev)
static void lpc_ec_read_resources(struct device *dev)
{
/* Nothing, but this function avoids an error on serial console. */
}
static void lpc_ec_enable_resources(device_t dev)
static void lpc_ec_enable_resources(struct device *dev)
{
/* Nothing, but this function avoids an error on serial console. */
}
@ -166,7 +166,7 @@ static struct pnp_info pnp_dev_info[] = {
{ &ops, 0, 0, { 0, 0 }, }
};
static void enable_dev(device_t dev)
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info),
pnp_dev_info);

4
src/ec/kontron/it8516e/ec.c
View File

@ -211,7 +211,7 @@ static void it8516e_set_fan_from_options(const config_t *const config,
}
}
static void it8516e_pm2_init(const device_t dev)
static void it8516e_pm2_init(struct device *dev)
{
const config_t *const config = dev->chip_info;
@ -251,7 +251,7 @@ static struct pnp_info it8516e_dev_infos[] = {
{ NULL, IT8516E_LDN_PM3, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x07ff, }, { 0x07ff, }, },
};
static void it8516e_enable(const device_t dev)
static void it8516e_enable(struct device *dev)
{
pnp_enable_devices(dev, &pnp_ops,
ARRAY_SIZE(it8516e_dev_infos), it8516e_dev_infos);

4
src/ec/lenovo/h8/h8.c
View File

@ -167,7 +167,7 @@ u8 h8_build_id_and_function_spec_version(char *buf, u8 buf_len)
return i;
}
static void h8_smbios_strings(device_t dev, struct smbios_type11 *t)
static void h8_smbios_strings(struct device *dev, struct smbios_type11 *t)
{
char tpec[] = "IBM ThinkPad Embedded Controller -[ ]-";
@ -180,7 +180,7 @@ struct device_operations h8_dev_ops = {
.get_smbios_strings = h8_smbios_strings
};
static void h8_enable(device_t dev)
static void h8_enable(struct device *dev)
{
struct ec_lenovo_h8_config *conf = dev->chip_info;
u8 val, tmp;

2
src/ec/lenovo/pmh7/pmh7.c
View File

@ -102,7 +102,7 @@ void pmh7_register_write(int reg, int val)
#ifndef __PRE_RAM__
#ifndef __SMM__
static void enable_dev(device_t dev)
static void enable_dev(struct device *dev)
{
struct ec_lenovo_pmh7_config *conf = dev->chip_info;
struct resource *resource;

8
src/ec/quanta/ene_kb3940q/ec.c
View File

@ -141,7 +141,7 @@ static void ene_kb3940q_log_events(void)
#endif
}
static void ene_kb3940q_init(device_t dev)
static void ene_kb3940q_init(struct device *dev)
{
if (!dev->enabled)
return;
@ -153,13 +153,13 @@ static void ene_kb3940q_init(device_t dev)
}
static void ene_kb3940q_read_resources(device_t dev)
static void ene_kb3940q_read_resources(struct device *dev)
{
/* This function avoids an error on serial console. */
}
static void ene_kb3940q_enable_resources(device_t dev)
static void ene_kb3940q_enable_resources(struct device *dev)
{
/* This function avoids an error on serial console. */
}
@ -174,7 +174,7 @@ static struct pnp_info pnp_dev_info[] = {
{ &ops, 0, 0, { 0, 0 }, }
};
static void enable_dev(device_t dev)
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info),
pnp_dev_info);

8
src/ec/quanta/it8518/ec.c
View File

@ -156,7 +156,7 @@ void ec_it8518_enable_wake_events(void)
}
#ifndef __SMM__
static void it8518_init(device_t dev)
static void it8518_init(struct device *dev)
{
if (!dev->enabled)
return;
@ -166,13 +166,13 @@ static void it8518_init(device_t dev)
}
static void it8518_read_resources(device_t dev)
static void it8518_read_resources(struct device *dev)
{
/* This function avoids an error on serial console. */
}
static void it8518_enable_resources(device_t dev)
static void it8518_enable_resources(struct device *dev)
{
/* This function avoids an error on serial console. */
}
@ -187,7 +187,7 @@ static struct pnp_info pnp_dev_info[] = {
{ &ops, 0, 0, { 0, 0 }, }
};
static void enable_dev(device_t dev)
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info),
pnp_dev_info);

2
src/ec/smsc/mec1308/ec.c
View File

@ -121,7 +121,7 @@ void ec_set_ports(u16 cmd_reg, u16 data_reg)
}
#if !defined(__PRE_RAM__) && !defined(__SMM__)
static void mec1308_enable(device_t dev)
static void mec1308_enable(struct device *dev)
{
struct ec_smsc_mec1308_config *conf = dev->chip_info;

2
src/superio/fintek/f71869ad/f71869ad_hwm.c
View File

@ -62,7 +62,7 @@ static void pnp_write_index(u16 port, u8 reg, u8 value)
}
/* note: multifunc registers need to be tweaked before here */
void f71869ad_hwm_init(device_t dev)
void f71869ad_hwm_init(struct device *dev)
{
const struct superio_fintek_f71869ad_config *conf = dev->chip_info;
struct resource *res = find_resource(dev, PNP_IDX_IO0);

2
src/superio/fintek/f71869ad/f71869ad_multifunc.c
View File

@ -30,7 +30,7 @@
#define MULTI_FUNC_SEL_REG4 0x2B
#define MULTI_FUNC_SEL_REG5 0x2C
void f71869ad_multifunc_init(device_t dev)
void f71869ad_multifunc_init(struct device *dev)
{
const struct superio_fintek_f71869ad_config *conf = dev->chip_info;

4
src/superio/fintek/f71869ad/fintek_internal.h
View File

@ -24,7 +24,7 @@
#include <arch/io.h>
#include <device/pnp.h>
void f71869ad_multifunc_init(device_t dev);
void f71869ad_hwm_init(device_t dev);
void f71869ad_multifunc_init(struct device *dev);
void f71869ad_hwm_init(struct device *dev);
#endif /* SUPERIO_FINTEK_F71869AD_INTERNAL_H */

2
src/superio/ite/it8728f/it8728f_hwm.c
View File

@ -41,7 +41,7 @@ static void pnp_write_index(u16 port, u8 reg, u8 value)
outb(value, port + 1);
}
void it8728f_hwm_ec_init(device_t dev)
void it8728f_hwm_ec_init(struct device *dev)
{
struct superio_ite_it8728f_config *conf = dev->chip_info;
struct resource *res = find_resource(dev, PNP_IDX_IO0);

2
src/superio/ite/it8728f/it8728f_internal.h
View File

@ -23,6 +23,6 @@
#include <device/device.h>
void it8728f_hwm_ec_init(device_t dev);
void it8728f_hwm_ec_init(struct device *dev);
#endif /* SUPERIO_ITE_IT8728F_INTERNAL_H */

2
src/superio/smsc/fdc37n972/fdc37n972.c
View File

@ -24,7 +24,7 @@
#include "fdc37n972.h"
static void init(device_t dev)
static void init(struct device *dev)
{
if (!dev->enabled)
return;

2
src/superio/smsc/sio10n268/sio10n268.c
View File

@ -23,7 +23,7 @@
#include <pc80/keyboard.h>
#include "sio10n268.h"
static void init(device_t dev)
static void init(struct device *dev)
{
if (!dev->enabled)
return;

4
src/superio/via/vt1211/vt1211.c
View File

@ -44,7 +44,7 @@ static u8 hwm_io_regs[] = {
0x5c,0x00, 0x5f,0x33, 0x40,0x01,
};
static void vt1211_set_iobase(device_t dev, u8 index, u16 iobase)
static void vt1211_set_iobase(struct device *dev, u8 index, u16 iobase)
{
switch (dev->path.pnp.device) {
case VT1211_FDC:
@ -107,7 +107,7 @@ static void vt1211_init(struct device *dev)
}
}
static void vt1211_pnp_enable_resources(device_t dev)
static void vt1211_pnp_enable_resources(struct device *dev)
{
printk(BIOS_DEBUG, "%s - enabling\n", dev_path(dev));
pnp_enable_resources(dev);