mb/google/kahlee: use gpio.h include

Replace the amdblocks/gpio.h, amdblocks/gpio_defs.h and soc/gpio.h
includes with the common gpio.h which will include soc/gpio.h which will
include amdblocks/gpio.h which will include amdblocks/gpio_defs.h in the
AMD SoC case.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I13bc33b91f6e6d52867da9043bb386f3befac5fb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70433
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Felix Held 2022-12-06 21:34:41 +01:00
parent e1f6db512f
commit 2cc2bd2d2f
6 changed files with 6 additions and 7 deletions

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@ -2,7 +2,7 @@
#include <baseboard/variants.h>
#include <bootblock_common.h>
#include <soc/gpio.h>
#include <gpio.h>
#include <soc/southbridge.h>
#include <amdblocks/lpc.h>
#include <variant/ec.h>

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@ -10,8 +10,8 @@
#include <amdblocks/i2c.h>
#include <baseboard/variants.h>
#include <boardid.h>
#include <gpio.h>
#include <smbios.h>
#include <soc/gpio.h>
#include <soc/pci_devs.h>
#include <soc/southbridge.h>
#include <amdblocks/acpimmio.h>

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@ -3,7 +3,7 @@
#include <amdblocks/dimm_spd.h>
#include <arch/romstage.h>
#include <baseboard/variants.h>
#include <soc/gpio.h>
#include <gpio.h>
int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/variants.h>
#include <soc/gpio.h>
#include <gpio.h>
#include <soc/southbridge.h>
#include <variant/gpio.h>

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@ -4,8 +4,7 @@
#define __BASEBOARD_GPIO_H__
#ifndef __ACPI__
#include <amdblocks/gpio_defs.h>
#include <soc/gpio.h>
#include <gpio.h>
# define MEM_CONFIG0 GPIO_139
# define MEM_CONFIG1 GPIO_142

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <gpio.h>
#include <security/tpm/tis.h>
#include <soc/gpio.h>
#include <variant/gpio.h>
int tis_plat_irq_status(void)