mb/google/kahlee: use gpio.h include
Replace the amdblocks/gpio.h, amdblocks/gpio_defs.h and soc/gpio.h includes with the common gpio.h which will include soc/gpio.h which will include amdblocks/gpio.h which will include amdblocks/gpio_defs.h in the AMD SoC case. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I13bc33b91f6e6d52867da9043bb386f3befac5fb Reviewed-on: https://review.coreboot.org/c/coreboot/+/70433 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
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@ -2,7 +2,7 @@
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#include <baseboard/variants.h>
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#include <bootblock_common.h>
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#include <soc/gpio.h>
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#include <gpio.h>
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#include <soc/southbridge.h>
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#include <amdblocks/lpc.h>
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#include <variant/ec.h>
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@ -10,8 +10,8 @@
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#include <amdblocks/i2c.h>
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#include <baseboard/variants.h>
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#include <boardid.h>
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#include <gpio.h>
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#include <smbios.h>
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#include <soc/gpio.h>
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#include <soc/pci_devs.h>
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#include <soc/southbridge.h>
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#include <amdblocks/acpimmio.h>
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@ -3,7 +3,7 @@
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#include <amdblocks/dimm_spd.h>
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#include <arch/romstage.h>
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#include <baseboard/variants.h>
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#include <soc/gpio.h>
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#include <gpio.h>
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int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len)
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{
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <baseboard/variants.h>
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#include <soc/gpio.h>
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#include <gpio.h>
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#include <soc/southbridge.h>
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#include <variant/gpio.h>
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#define __BASEBOARD_GPIO_H__
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#ifndef __ACPI__
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#include <amdblocks/gpio_defs.h>
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#include <soc/gpio.h>
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#include <gpio.h>
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# define MEM_CONFIG0 GPIO_139
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# define MEM_CONFIG1 GPIO_142
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <gpio.h>
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#include <security/tpm/tis.h>
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#include <soc/gpio.h>
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#include <variant/gpio.h>
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int tis_plat_irq_status(void)
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