From 2cc351da5f57e78b44eff50a5c1297a1ab2b79ee Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Sun, 13 Nov 2016 17:48:13 +0100 Subject: [PATCH] src/cpu/intel/model_f4x: Update cpu_table CPUID 0xf47 tested on on 945G-M4 board. Needs more MSR's consistency tests. To do: test if speedstep.c and speedstep/acpi.c are ok for model_f4x. Change-Id: I285ad33804592e3df510d61dd24f14f944e05142 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/17409 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/cpu/intel/model_f4x/model_f4x_init.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/cpu/intel/model_f4x/model_f4x_init.c b/src/cpu/intel/model_f4x/model_f4x_init.c index a45fc7cb7e..a5322d7cbc 100644 --- a/src/cpu/intel/model_f4x/model_f4x_init.c +++ b/src/cpu/intel/model_f4x/model_f4x_init.c @@ -46,6 +46,12 @@ static struct device_operations cpu_dev_ops = { static const struct cpu_device_id cpu_table[] = { { X86_VENDOR_INTEL, 0x0f41 }, /* Xeon */ + { X86_VENDOR_INTEL, 0x0f43 }, /* Not tested */ + { X86_VENDOR_INTEL, 0x0f44 }, /* Not tested */ + { X86_VENDOR_INTEL, 0x0f47 }, + { X86_VENDOR_INTEL, 0x0f48 }, /* Not tested */ + { X86_VENDOR_INTEL, 0x0f49 }, /* Not tested */ + { X86_VENDOR_INTEL, 0x0f4a }, /* Not tested */ { 0, 0 }, };