build system: Always add coreboot.pre dependency to intermediates

They all operate on that file, so just add it globally.

Change-Id: I953975a4078d0f4a5ec0b6248f0dcedada69afb2
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49380
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Patrick Georgi 2021-01-13 09:15:07 +01:00
parent 0b7d3a154e
commit 2cc5bcbf7f
10 changed files with 16 additions and 16 deletions

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@ -1145,7 +1145,7 @@ RAMSTAGE=
endif endif
add_intermediate = \ add_intermediate = \
$(1): $(2) | $(INTERMEDIATE) \ $(1): $(obj)/coreboot.pre $(2) | $(INTERMEDIATE) \
$(eval INTERMEDIATE+=$(1)) $(eval PHONY+=$(1)) $(eval INTERMEDIATE+=$(1)) $(eval PHONY+=$(1))
$(obj)/coreboot.rom: $(obj)/coreboot.pre $(RAMSTAGE) $(CBFSTOOL) $$(INTERMEDIATE) $(obj)/coreboot.rom: $(obj)/coreboot.pre $(RAMSTAGE) $(CBFSTOOL) $$(INTERMEDIATE)
@ -1251,7 +1251,7 @@ cbfs-get-segments-cmd = $(CBFSTOOL) $(obj)/coreboot.pre print -v | sed -n \
ramstage-symbol-addr-cmd = $(OBJDUMP_ramstage) -t $(objcbfs)/ramstage.elf | \ ramstage-symbol-addr-cmd = $(OBJDUMP_ramstage) -t $(objcbfs)/ramstage.elf | \
sed -n '/ $(1)$$/s/^\([0-9a-fA-F]*\) .*/0x\1/p' sed -n '/ $(1)$$/s/^\([0-9a-fA-F]*\) .*/0x\1/p'
$(call add_intermediate, check-ramstage-overlaps, $(obj)/coreboot.pre) $(call add_intermediate, check-ramstage-overlaps)
programs=$$($(foreach file,$(check-ramstage-overlap-files), \ programs=$$($(foreach file,$(check-ramstage-overlap-files), \
$(call cbfs-get-segments-cmd,$(file)) ; )) ; \ $(call cbfs-get-segments-cmd,$(file)) ; )) ; \
regions=$$($(foreach region,$(check-ramstage-overlap-regions), \ regions=$$($(foreach region,$(check-ramstage-overlap-regions), \

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@ -101,7 +101,7 @@ endif
ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),) ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),)
ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),0) ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),0)
$(call add_intermediate, seabios_ps2_timeout, $(obj)/coreboot.pre $(CBFSTOOL)) $(call add_intermediate, seabios_ps2_timeout, $(CBFSTOOL))
@printf " SeaBIOS Wait up to $(CONFIG_SEABIOS_PS2_TIMEOUT) ms for PS/2 keyboard controller initialization\n" @printf " SeaBIOS Wait up to $(CONFIG_SEABIOS_PS2_TIMEOUT) ms for PS/2 keyboard controller initialization\n"
$(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/ps2-keyboard-spinup 2>/dev/null) $(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/ps2-keyboard-spinup 2>/dev/null)
$(CBFSTOOL) $< add-int -i $(CONFIG_SEABIOS_PS2_TIMEOUT) -n etc/ps2-keyboard-spinup $(CBFSTOOL) $< add-int -i $(CONFIG_SEABIOS_PS2_TIMEOUT) -n etc/ps2-keyboard-spinup
@ -109,14 +109,14 @@ endif
endif endif
ifeq ($(CONFIG_SEABIOS_ADD_SERCON_PORT_FILE),y) ifeq ($(CONFIG_SEABIOS_ADD_SERCON_PORT_FILE),y)
$(call add_intermediate, seabios_sercon, $(obj)/coreboot.pre $(CBFSTOOL)) $(call add_intermediate, seabios_sercon, $(CBFSTOOL))
@printf " SeaBIOS Add sercon-port file\n" @printf " SeaBIOS Add sercon-port file\n"
$(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/sercon-port 2>/dev/null) $(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/sercon-port 2>/dev/null)
$(CBFSTOOL) $< add-int -i $(CONFIG_SEABIOS_SERCON_PORT_ADDR) -n etc/sercon-port $(CBFSTOOL) $< add-int -i $(CONFIG_SEABIOS_SERCON_PORT_ADDR) -n etc/sercon-port
endif endif
ifeq ($(CONFIG_SEABIOS_THREAD_OPTIONROMS),y) ifeq ($(CONFIG_SEABIOS_THREAD_OPTIONROMS),y)
$(call add_intermediate, seabios_thread_optionroms, $(obj)/coreboot.pre $(CBFSTOOL)) $(call add_intermediate, seabios_thread_optionroms, $(CBFSTOOL))
@printf " SeaBIOS Thread optionroms\n" @printf " SeaBIOS Thread optionroms\n"
$(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/threads 2>/dev/null) $(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/threads 2>/dev/null)
$(CBFSTOOL) $< add-int -i 2 -n etc/threads $(CBFSTOOL) $< add-int -i 2 -n etc/threads

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@ -6,14 +6,14 @@ ifneq ($(CONFIG_UPDATE_IMAGE),y) # never update the bootblock
ifneq ($(CONFIG_CPU_MICROCODE_CBFS_NONE),y) ifneq ($(CONFIG_CPU_MICROCODE_CBFS_NONE),y)
$(call add_intermediate, add_mcu_fit, $(obj)/coreboot.pre $(IFITTOOL)) $(call add_intermediate, add_mcu_fit, $(IFITTOOL))
@printf " UPDATE-FIT Microcode\n" @printf " UPDATE-FIT Microcode\n"
$(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT $(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT
# Second FIT in TOP_SWAP bootblock # Second FIT in TOP_SWAP bootblock
ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y) ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y)
$(call add_intermediate, add_ts_mcu_fit, $(obj)/coreboot.pre $(IFITTOOL)) $(call add_intermediate, add_ts_mcu_fit, $(IFITTOOL))
@printf " UPDATE-FIT Top Swap: Microcode\n" @printf " UPDATE-FIT Top Swap: Microcode\n"
ifneq ($(FIT_ENTRY),) ifneq ($(FIT_ENTRY),)
$(IFITTOOL) -f $< -A -n $(FIT_ENTRY) -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT $(IFITTOOL) -f $< -A -n $(FIT_ENTRY) -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT

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@ -16,7 +16,7 @@ ecfw2.bin-position := $(CONFIG_KBC1126_FW2_OFFSET)
ecfw2.bin-type := raw ecfw2.bin-type := raw
endif endif
$(call add_intermediate, kbc1126_ec_insert, $(obj)/coreboot.pre) $(call add_intermediate, kbc1126_ec_insert)
ifeq ($(CONFIG_KBC1126_FIRMWARE),y) ifeq ($(CONFIG_KBC1126_FIRMWARE),y)
printf " Building kbc1126_ec_insert.\n" printf " Building kbc1126_ec_insert.\n"
$(MAKE) -C util/kbc1126 $(MAKE) -C util/kbc1126

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@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only # SPDX-License-Identifier: GPL-2.0-only
ifeq ($(CONFIG_MAJOLICA_HAVE_MCHP_FW),y) ifeq ($(CONFIG_MAJOLICA_HAVE_MCHP_FW),y)
$(call add_intermediate, add_mchp_fw, $(obj)/coreboot.pre) $(call add_intermediate, add_mchp_fw)
$(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_MAJOLICA_MCHP_FW_FILE) --fill-upward $(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_MAJOLICA_MCHP_FW_FILE) --fill-upward
else else
files_added:: warn_no_mchp files_added:: warn_no_mchp

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@ -18,7 +18,7 @@ endif
ifeq ($(CONFIG_MANDOLIN_HAVE_MCHP_FW),y) ifeq ($(CONFIG_MANDOLIN_HAVE_MCHP_FW),y)
$(call add_intermediate, add_mchp_fw, $(obj)/coreboot.pre) $(call add_intermediate, add_mchp_fw)
$(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_MANDOLIN_MCHP_FW_FILE) --fill-upward $(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_MANDOLIN_MCHP_FW_FILE) --fill-upward
else else

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@ -6,7 +6,7 @@ boot_policy_manifest.bin-file := $(CONFIG_INTEL_CBNT_BOOT_POLICY_MANIFEST_BINARY
boot_policy_manifest.bin-type := raw boot_policy_manifest.bin-type := raw
boot_policy_manifest.bin-align := 0x10 boot_policy_manifest.bin-align := 0x10
$(call add_intermediate, add_bpm_fit, $(obj)/coreboot.pre $(IFITTOOL)) $(call add_intermediate, add_bpm_fit, $(IFITTOOL))
$(IFITTOOL) -r COREBOOT -a -n boot_policy_manifest.bin -t 12 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $< $(IFITTOOL) -r COREBOOT -a -n boot_policy_manifest.bin -t 12 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $<
endif endif
@ -16,7 +16,7 @@ key_manifest.bin-file := $(CONFIG_INTEL_CBNT_KEY_MANIFEST_BINARY)
key_manifest.bin-type := raw key_manifest.bin-type := raw
key_manifest.bin-align := 0x10 key_manifest.bin-align := 0x10
$(call add_intermediate, add_km_fit, $(obj)/coreboot.pre $(IFITTOOL)) $(call add_intermediate, add_km_fit, $(IFITTOOL))
$(IFITTOOL) -r COREBOOT -a -n key_manifest.bin -t 11 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $< $(IFITTOOL) -r COREBOOT -a -n key_manifest.bin -t 11 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $<
endif endif

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@ -28,7 +28,7 @@ endif
ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y) ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
$(call add_intermediate, add_acm_fit, $(obj)/coreboot.pre $(IFITTOOL)) $(call add_intermediate, add_acm_fit, $(IFITTOOL))
$(IFITTOOL) -r COREBOOT -a -n $(CONFIG_INTEL_TXT_CBFS_BIOS_ACM) -t 2 \ $(IFITTOOL) -r COREBOOT -a -n $(CONFIG_INTEL_TXT_CBFS_BIOS_ACM) -t 2 \
-s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $< -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $<
@ -41,7 +41,7 @@ ibb-files := $(foreach file,$(cbfs-files), \
ibb-files += bootblock ibb-files += bootblock
$(call add_intermediate, add_ibb_fit, $(obj)/coreboot.pre $(IFITTOOL)) $(call add_intermediate, add_ibb_fit, $(IFITTOOL))
$(foreach file, $(ibb-files), $(shell $(IFITTOOL) -f $< -a -n $(file) -t 7 \ $(foreach file, $(ibb-files), $(shell $(IFITTOOL) -f $< -a -n $(file) -t 7 \
-s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT)) true -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT)) true

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@ -167,7 +167,7 @@ STONEYRIDGE_FWM_ROM_POSITION=$(call int-add, \
$(call int-shift-left, \ $(call int-shift-left, \
0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000) 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000)
$(call add_intermediate, add_amdfw, $(obj)/coreboot.pre $(obj)/amdfw.rom) $(call add_intermediate, add_amdfw, $(obj)/amdfw.rom)
printf " DD Adding AMD Firmware at ROM offset 0x%x\n" \ printf " DD Adding AMD Firmware at ROM offset 0x%x\n" \
"$(STONEYRIDGE_FWM_ROM_POSITION)" "$(STONEYRIDGE_FWM_ROM_POSITION)"
dd if=$(obj)/amdfw.rom \ dd if=$(obj)/amdfw.rom \

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@ -157,7 +157,7 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM_FILE)) \
--output $@ --output $@
ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
$(call add_intermediate, add_amdfw, $(obj)/coreboot.pre $(obj)/amdfw.rom) $(call add_intermediate, add_amdfw, $(obj)/amdfw.rom)
printf " DD Adding AMD Firmware\n" printf " DD Adding AMD Firmware\n"
dd if=$(obj)/amdfw.rom \ dd if=$(obj)/amdfw.rom \
of=$(obj)/coreboot.pre conv=notrunc bs=1 seek=131072 >/dev/null 2>&1 of=$(obj)/coreboot.pre conv=notrunc bs=1 seek=131072 >/dev/null 2>&1