build system: Always add coreboot.pre dependency to intermediates
They all operate on that file, so just add it globally. Change-Id: I953975a4078d0f4a5ec0b6248f0dcedada69afb2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49380 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
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0b7d3a154e
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@ -1145,7 +1145,7 @@ RAMSTAGE=
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endif
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endif
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add_intermediate = \
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add_intermediate = \
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$(1): $(2) | $(INTERMEDIATE) \
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$(1): $(obj)/coreboot.pre $(2) | $(INTERMEDIATE) \
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$(eval INTERMEDIATE+=$(1)) $(eval PHONY+=$(1))
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$(eval INTERMEDIATE+=$(1)) $(eval PHONY+=$(1))
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$(obj)/coreboot.rom: $(obj)/coreboot.pre $(RAMSTAGE) $(CBFSTOOL) $$(INTERMEDIATE)
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$(obj)/coreboot.rom: $(obj)/coreboot.pre $(RAMSTAGE) $(CBFSTOOL) $$(INTERMEDIATE)
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@ -1251,7 +1251,7 @@ cbfs-get-segments-cmd = $(CBFSTOOL) $(obj)/coreboot.pre print -v | sed -n \
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ramstage-symbol-addr-cmd = $(OBJDUMP_ramstage) -t $(objcbfs)/ramstage.elf | \
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ramstage-symbol-addr-cmd = $(OBJDUMP_ramstage) -t $(objcbfs)/ramstage.elf | \
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sed -n '/ $(1)$$/s/^\([0-9a-fA-F]*\) .*/0x\1/p'
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sed -n '/ $(1)$$/s/^\([0-9a-fA-F]*\) .*/0x\1/p'
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$(call add_intermediate, check-ramstage-overlaps, $(obj)/coreboot.pre)
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$(call add_intermediate, check-ramstage-overlaps)
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programs=$$($(foreach file,$(check-ramstage-overlap-files), \
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programs=$$($(foreach file,$(check-ramstage-overlap-files), \
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$(call cbfs-get-segments-cmd,$(file)) ; )) ; \
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$(call cbfs-get-segments-cmd,$(file)) ; )) ; \
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regions=$$($(foreach region,$(check-ramstage-overlap-regions), \
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regions=$$($(foreach region,$(check-ramstage-overlap-regions), \
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@ -101,7 +101,7 @@ endif
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ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),)
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ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),)
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ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),0)
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ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),0)
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$(call add_intermediate, seabios_ps2_timeout, $(obj)/coreboot.pre $(CBFSTOOL))
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$(call add_intermediate, seabios_ps2_timeout, $(CBFSTOOL))
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@printf " SeaBIOS Wait up to $(CONFIG_SEABIOS_PS2_TIMEOUT) ms for PS/2 keyboard controller initialization\n"
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@printf " SeaBIOS Wait up to $(CONFIG_SEABIOS_PS2_TIMEOUT) ms for PS/2 keyboard controller initialization\n"
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$(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/ps2-keyboard-spinup 2>/dev/null)
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$(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/ps2-keyboard-spinup 2>/dev/null)
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$(CBFSTOOL) $< add-int -i $(CONFIG_SEABIOS_PS2_TIMEOUT) -n etc/ps2-keyboard-spinup
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$(CBFSTOOL) $< add-int -i $(CONFIG_SEABIOS_PS2_TIMEOUT) -n etc/ps2-keyboard-spinup
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@ -109,14 +109,14 @@ endif
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endif
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endif
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ifeq ($(CONFIG_SEABIOS_ADD_SERCON_PORT_FILE),y)
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ifeq ($(CONFIG_SEABIOS_ADD_SERCON_PORT_FILE),y)
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$(call add_intermediate, seabios_sercon, $(obj)/coreboot.pre $(CBFSTOOL))
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$(call add_intermediate, seabios_sercon, $(CBFSTOOL))
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@printf " SeaBIOS Add sercon-port file\n"
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@printf " SeaBIOS Add sercon-port file\n"
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$(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/sercon-port 2>/dev/null)
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$(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/sercon-port 2>/dev/null)
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$(CBFSTOOL) $< add-int -i $(CONFIG_SEABIOS_SERCON_PORT_ADDR) -n etc/sercon-port
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$(CBFSTOOL) $< add-int -i $(CONFIG_SEABIOS_SERCON_PORT_ADDR) -n etc/sercon-port
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endif
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endif
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ifeq ($(CONFIG_SEABIOS_THREAD_OPTIONROMS),y)
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ifeq ($(CONFIG_SEABIOS_THREAD_OPTIONROMS),y)
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$(call add_intermediate, seabios_thread_optionroms, $(obj)/coreboot.pre $(CBFSTOOL))
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$(call add_intermediate, seabios_thread_optionroms, $(CBFSTOOL))
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@printf " SeaBIOS Thread optionroms\n"
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@printf " SeaBIOS Thread optionroms\n"
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$(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/threads 2>/dev/null)
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$(if $(CONFIG_UPDATE_IMAGE),-$(CBFSTOOL) $< remove -n etc/threads 2>/dev/null)
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$(CBFSTOOL) $< add-int -i 2 -n etc/threads
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$(CBFSTOOL) $< add-int -i 2 -n etc/threads
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@ -6,14 +6,14 @@ ifneq ($(CONFIG_UPDATE_IMAGE),y) # never update the bootblock
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ifneq ($(CONFIG_CPU_MICROCODE_CBFS_NONE),y)
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ifneq ($(CONFIG_CPU_MICROCODE_CBFS_NONE),y)
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$(call add_intermediate, add_mcu_fit, $(obj)/coreboot.pre $(IFITTOOL))
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$(call add_intermediate, add_mcu_fit, $(IFITTOOL))
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@printf " UPDATE-FIT Microcode\n"
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@printf " UPDATE-FIT Microcode\n"
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$(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT
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$(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT
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# Second FIT in TOP_SWAP bootblock
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# Second FIT in TOP_SWAP bootblock
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ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y)
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ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y)
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$(call add_intermediate, add_ts_mcu_fit, $(obj)/coreboot.pre $(IFITTOOL))
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$(call add_intermediate, add_ts_mcu_fit, $(IFITTOOL))
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@printf " UPDATE-FIT Top Swap: Microcode\n"
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@printf " UPDATE-FIT Top Swap: Microcode\n"
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ifneq ($(FIT_ENTRY),)
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ifneq ($(FIT_ENTRY),)
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$(IFITTOOL) -f $< -A -n $(FIT_ENTRY) -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT
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$(IFITTOOL) -f $< -A -n $(FIT_ENTRY) -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT
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@ -16,7 +16,7 @@ ecfw2.bin-position := $(CONFIG_KBC1126_FW2_OFFSET)
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ecfw2.bin-type := raw
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ecfw2.bin-type := raw
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endif
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endif
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$(call add_intermediate, kbc1126_ec_insert, $(obj)/coreboot.pre)
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$(call add_intermediate, kbc1126_ec_insert)
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ifeq ($(CONFIG_KBC1126_FIRMWARE),y)
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ifeq ($(CONFIG_KBC1126_FIRMWARE),y)
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printf " Building kbc1126_ec_insert.\n"
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printf " Building kbc1126_ec_insert.\n"
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$(MAKE) -C util/kbc1126
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$(MAKE) -C util/kbc1126
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@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0-only
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# SPDX-License-Identifier: GPL-2.0-only
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ifeq ($(CONFIG_MAJOLICA_HAVE_MCHP_FW),y)
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ifeq ($(CONFIG_MAJOLICA_HAVE_MCHP_FW),y)
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$(call add_intermediate, add_mchp_fw, $(obj)/coreboot.pre)
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$(call add_intermediate, add_mchp_fw)
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$(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_MAJOLICA_MCHP_FW_FILE) --fill-upward
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$(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_MAJOLICA_MCHP_FW_FILE) --fill-upward
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else
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else
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files_added:: warn_no_mchp
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files_added:: warn_no_mchp
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@ -18,7 +18,7 @@ endif
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ifeq ($(CONFIG_MANDOLIN_HAVE_MCHP_FW),y)
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ifeq ($(CONFIG_MANDOLIN_HAVE_MCHP_FW),y)
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$(call add_intermediate, add_mchp_fw, $(obj)/coreboot.pre)
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$(call add_intermediate, add_mchp_fw)
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$(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_MANDOLIN_MCHP_FW_FILE) --fill-upward
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$(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_MANDOLIN_MCHP_FW_FILE) --fill-upward
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else
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else
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@ -6,7 +6,7 @@ boot_policy_manifest.bin-file := $(CONFIG_INTEL_CBNT_BOOT_POLICY_MANIFEST_BINARY
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boot_policy_manifest.bin-type := raw
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boot_policy_manifest.bin-type := raw
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boot_policy_manifest.bin-align := 0x10
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boot_policy_manifest.bin-align := 0x10
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$(call add_intermediate, add_bpm_fit, $(obj)/coreboot.pre $(IFITTOOL))
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$(call add_intermediate, add_bpm_fit, $(IFITTOOL))
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$(IFITTOOL) -r COREBOOT -a -n boot_policy_manifest.bin -t 12 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $<
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$(IFITTOOL) -r COREBOOT -a -n boot_policy_manifest.bin -t 12 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $<
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endif
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endif
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@ -16,7 +16,7 @@ key_manifest.bin-file := $(CONFIG_INTEL_CBNT_KEY_MANIFEST_BINARY)
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key_manifest.bin-type := raw
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key_manifest.bin-type := raw
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key_manifest.bin-align := 0x10
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key_manifest.bin-align := 0x10
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$(call add_intermediate, add_km_fit, $(obj)/coreboot.pre $(IFITTOOL))
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$(call add_intermediate, add_km_fit, $(IFITTOOL))
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$(IFITTOOL) -r COREBOOT -a -n key_manifest.bin -t 11 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $<
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$(IFITTOOL) -r COREBOOT -a -n key_manifest.bin -t 11 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $<
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endif
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endif
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@ -28,7 +28,7 @@ endif
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ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
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ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
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$(call add_intermediate, add_acm_fit, $(obj)/coreboot.pre $(IFITTOOL))
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$(call add_intermediate, add_acm_fit, $(IFITTOOL))
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$(IFITTOOL) -r COREBOOT -a -n $(CONFIG_INTEL_TXT_CBFS_BIOS_ACM) -t 2 \
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$(IFITTOOL) -r COREBOOT -a -n $(CONFIG_INTEL_TXT_CBFS_BIOS_ACM) -t 2 \
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-s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $<
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-s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -f $<
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@ -41,7 +41,7 @@ ibb-files := $(foreach file,$(cbfs-files), \
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ibb-files += bootblock
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ibb-files += bootblock
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$(call add_intermediate, add_ibb_fit, $(obj)/coreboot.pre $(IFITTOOL))
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$(call add_intermediate, add_ibb_fit, $(IFITTOOL))
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$(foreach file, $(ibb-files), $(shell $(IFITTOOL) -f $< -a -n $(file) -t 7 \
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$(foreach file, $(ibb-files), $(shell $(IFITTOOL) -f $< -a -n $(file) -t 7 \
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-s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT)) true
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-s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT)) true
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@ -167,7 +167,7 @@ STONEYRIDGE_FWM_ROM_POSITION=$(call int-add, \
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$(call int-shift-left, \
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$(call int-shift-left, \
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0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000)
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0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000)
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$(call add_intermediate, add_amdfw, $(obj)/coreboot.pre $(obj)/amdfw.rom)
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$(call add_intermediate, add_amdfw, $(obj)/amdfw.rom)
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printf " DD Adding AMD Firmware at ROM offset 0x%x\n" \
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printf " DD Adding AMD Firmware at ROM offset 0x%x\n" \
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"$(STONEYRIDGE_FWM_ROM_POSITION)"
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"$(STONEYRIDGE_FWM_ROM_POSITION)"
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dd if=$(obj)/amdfw.rom \
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dd if=$(obj)/amdfw.rom \
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@ -157,7 +157,7 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM_FILE)) \
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--output $@
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--output $@
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ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
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ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
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$(call add_intermediate, add_amdfw, $(obj)/coreboot.pre $(obj)/amdfw.rom)
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$(call add_intermediate, add_amdfw, $(obj)/amdfw.rom)
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printf " DD Adding AMD Firmware\n"
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printf " DD Adding AMD Firmware\n"
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dd if=$(obj)/amdfw.rom \
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dd if=$(obj)/amdfw.rom \
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of=$(obj)/coreboot.pre conv=notrunc bs=1 seek=131072 >/dev/null 2>&1
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of=$(obj)/coreboot.pre conv=notrunc bs=1 seek=131072 >/dev/null 2>&1
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