mb/asus/kgpe-d16: Enable TPM when selected in Kconfig
Issue TPM startup on romstage completion via common LPC TPM code if the TPM was enabled in Kconfig. Change-Id: Id886d6aeefa045fb979f128b1cf4c10fff243b24 Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com> Reviewed-on: https://review.coreboot.org/19338 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -1,7 +1,7 @@
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/*
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/*
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* This file is part of the coreboot project.
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* This file is part of the coreboot project.
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*
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*
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* Copyright (C) 2015 - 2016 Raptor Engineering, LLC
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* Copyright (C) 2015 - 2017 Raptor Engineering, LLC
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*
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*
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* Copyright (C) 2007 AMD
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* Copyright (C) 2007 AMD
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* Written by Yinghai Lu <yinghailu@amd.com> for AMD.
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* Written by Yinghai Lu <yinghailu@amd.com> for AMD.
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@ -45,6 +45,7 @@
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#include <cpu/amd/family_10h-family_15h/init_cpus.h>
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#include <cpu/amd/family_10h-family_15h/init_cpus.h>
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#include <arch/early_variables.h>
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#include <arch/early_variables.h>
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#include <cbmem.h>
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#include <cbmem.h>
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#include <tpm.h>
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#include "resourcemap.c"
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#include "resourcemap.c"
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#include "cpu/amd/quadcore/quadcore.c"
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#include "cpu/amd/quadcore/quadcore.c"
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@ -622,6 +623,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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pci_write_config16(PCI_DEV(0, 0x14, 0), 0x56, 0x0bb0);
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pci_write_config16(PCI_DEV(0, 0x14, 0), 0x56, 0x0bb0);
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pci_write_config16(PCI_DEV(0, 0x14, 0), 0x5a, 0x0ff0);
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pci_write_config16(PCI_DEV(0, 0x14, 0), 0x5a, 0x0ff0);
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if (IS_ENABLED(CONFIG_LPC_TPM))
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init_tpm(s3resume);
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post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB.
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post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB.
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post_code(0x43); // Should never see this post code.
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post_code(0x43); // Should never see this post code.
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}
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}
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