superio: Replace the indexed I/O functions

Replace the multiple indexed I/O read and write
functions with common functions.

Change-Id: Idfe7a8784c28d51b3fbcb2f4e26beaa0b91741a8
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/10145
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)

src/include/device/pnp.h

@@ -5,6 +5,7 @@
 #include <rules.h>
 #include <device/device.h>
 #include <device/pnp_def.h>
+#include <arch/io.h>
 
 #ifndef __SIMPLE_DEVICE__
 
@@ -63,5 +64,43 @@ struct pnp_mode_ops {
 void pnp_enter_conf_mode(device_t dev);
 void pnp_exit_conf_mode(device_t dev);
 
+/* PNP indexed I/O operations */
+
+/*
+ * u8 pnp_read_index(u16 port, u8 reg)
+ * Description:
+ *  This routine reads indexed I/O registers. The reg byte is written
+ *  to the index register at I/O address = port. The result is then
+ *  read from the data register at I/O address = port + 1.
+ *
+ * Parameters:
+ *  @param[in]  u16 port   = The I/O address of the port index register.
+ *  @param[in]  u8  reg    = The offset within the indexed space.
+ *  @param[out] u8  result = The value read back from the data register.
+ */
+static inline u8 pnp_read_index(u16 port, u8 reg)
+{
+	outb(reg, port);
+	return inb(port + 1);
+}
+
+/*
+ * void pnp_write_index(u16 port, u8 reg, u8 value)
+ * Description:
+ *  This routine writes indexed I/O registers. The reg byte is written
+ *  to the index register at I/O address = port. The value byte is then
+ *  written to the data register at I/O address = port + 1.
+ *
+ * Parameters:
+ *  @param[in] u16 port   = The address of the port index register.
+ *  @param[in] u8  reg    = The offset within the indexed space.
+ *  @param[in] u8  value  = The value to be written to the data register.
+ */
+static inline void pnp_write_index(u16 port, u8 reg, u8 value)
+{
+	outb(reg, port);
+	outb(value, port + 1);
+}
+
 #endif /* ! __SIMPLE_DEVICE__ */
 #endif /* DEVICE_PNP_H */

src/superio/fintek/f71869ad/f71869ad_hwm.c

@@ -55,12 +55,6 @@
 #define HWM_FAN1_SEG3_SPEED_COUNT  0xAC
 #define HWM_FAN1_TEMP_MAP_SEL      0xAF
 
-static void pnp_write_index(u16 port, u8 reg, u8 value)
-{
-	outb(reg, port);
-	outb(value, port + 1);
-}
-
 /* note: multifunc registers need to be tweaked before here */
 void f71869ad_hwm_init(struct device *dev)
 {

src/superio/ite/it8716f/superio.c

@@ -32,17 +32,6 @@
 #include "it8716f.h"
 
 #if !CONFIG_SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL
-static void pnp_write_index(u16 port_base, u8 reg, u8 value)
-{
-	outb(reg, port_base);
-	outb(value, port_base + 1);
-}
-
-static u8 pnp_read_index(u16 port_base, u8 reg)
-{
-	outb(reg, port_base);
-	return inb(port_base + 1);
-}
 
 static void init_ec(u16 base)
 {

src/superio/ite/it8728f/it8728f_hwm.c

@@ -35,12 +35,6 @@
 #define HWM_FAN3_CTL_PWM		 0x17	/* default 0x00 */
 #define HWM_ADC_TEMP_CHAN_EN_REG 0x51	/* default 0x00 */
 
-static void pnp_write_index(u16 port, u8 reg, u8 value)
-{
-	outb(reg, port);
-	outb(value, port + 1);
-}
-
 void it8728f_hwm_ec_init(struct device *dev)
 {
 	struct superio_ite_it8728f_config *conf = dev->chip_info;

src/superio/smsc/lpc47b397/superio.c

@@ -31,18 +31,6 @@
 #include <stdlib.h>
 #include "lpc47b397.h"
 
-static void pnp_write_index(u16 port, u8 reg, u8 value)
-{
-	outb(reg, port);
-	outb(value, port + 1);
-}
-
-static u8 pnp_read_index(u16 port, u8 reg)
-{
-	outb(reg, port);
-	return inb(port + 1);
-}
-
 static void enable_hwm_smbus(struct device *dev)
 {
 	/* Enable SensorBus register access. */

src/superio/winbond/w83627ehg/superio.c

@@ -32,18 +32,6 @@
 #include <stdlib.h>
 #include "w83627ehg.h"
 
-static void pnp_write_index(u16 port, u8 reg, u8 value)
-{
-	outb(reg, port);
-	outb(value, port + 1);
-}
-
-static u8 pnp_read_index(u16 port, u8 reg)
-{
-	outb(reg, port);
-	return inb(port + 1);
-}
-
 static void enable_hwm_smbus(struct device *dev)
 {
 	u8 reg8;

src/superio/winbond/w83627hf/superio.c

@@ -32,18 +32,6 @@
 #include <stdlib.h>
 #include "w83627hf.h"
 
-static void pnp_write_index(u16 port, u8 reg, u8 value)
-{
-	outb(reg, port);
-	outb(value, port + 1);
-}
-
-static u8 pnp_read_index(u16 port, u8 reg)
-{
-	outb(reg, port);
-	return inb(port + 1);
-}
-
 static void enable_hwm_smbus(struct device *dev)
 {
 	u8 reg8;