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broadwell: Drop weak `mainboard_fill_spd_data` definition 

Make `mainboard_fill_spd_data` mandatory and adapt mainboards to define
this function accordingly.

Change-Id: Ic18c4c574e8c963bbb41c980f43bdbacc57735af
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55806
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2021-06-23 14:29:12 +02:00 committed by Felix Held
parent 2bc7a6b3d2
commit 2d45322639
4 changed files with 16 additions and 10 deletions
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5
src/mainboard/intel/wtm2/pei_data.c
View File

@ -3,7 +3,7 @@
#include <soc/pei_data.h>
#include <soc/pei_wrapper.h>
void mainboard_fill_pei_data(struct pei_data *pei_data)
void mainboard_fill_spd_data(struct pei_data *pei_data)
{
/* One installed DIMM per channel */
pei_data->dimm_channel0_disabled = 2;
@ -11,7 +11,10 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
pei_data->spd_addresses[0] = 0xa2;
pei_data->spd_addresses[2] = 0xa2;
}
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
pei_data_usb2_port(pei_data, 0, 0x40, 1, USB_OC_PIN_SKIP,
USB_PORT_FRONT_PANEL);
pei_data_usb2_port(pei_data, 1, 0x40, 1, USB_OC_PIN_SKIP,

9
src/mainboard/purism/librem_bdw/variants/librem13v1/pei_data.c
View File

@ -3,13 +3,16 @@
#include <soc/pei_data.h>
#include <soc/pei_wrapper.h>
void mainboard_fill_pei_data(struct pei_data *pei_data)
void mainboard_fill_spd_data(struct pei_data *pei_data)
{
pei_data->ec_present = 1;
/* One DIMM slot */
pei_data->dimm_channel1_disabled = 3;
pei_data->spd_addresses[0] = 0xa0;
}
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
pei_data->ec_present = 1;
/* P1: Left Side Port (USB2 only) */
pei_data_usb2_port(pei_data, 0, 0x0080, 1, USB_OC_PIN_SKIP,

8
src/mainboard/purism/librem_bdw/variants/librem15v2/pei_data.c
View File

@ -3,9 +3,8 @@
#include <soc/pei_data.h>
#include <soc/pei_wrapper.h>
void mainboard_fill_pei_data(struct pei_data *pei_data)
void mainboard_fill_spd_data(struct pei_data *pei_data)
{
pei_data->ec_present = 1;
pei_data->dq_pins_interleaved = 1;
/* One DIMM slot */
@ -14,6 +13,11 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
pei_data->spd_addresses[0] = 0xa0;
pei_data->spd_addresses[2] = 0xa4;
}
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
pei_data->ec_present = 1;
/* P1: Right Side Port (USB2) */
pei_data_usb2_port(pei_data, 0, 0x0080, 1, USB_OC_PIN_SKIP,

4
src/soc/intel/broadwell/raminit.c
View File

@ -177,10 +177,6 @@ static void setup_sdram_meminfo(struct pei_data *pei_data)
}
}
__weak void mainboard_fill_spd_data(struct pei_data *pei_data)
{
}
void perform_raminit(const struct chipset_power_state *const power_state)
{
const int s3resume = power_state->prev_sleep_state == ACPI_S3;