amdfam10: Fix mismatch of function declarations

Callsite declared returning int, which makes more sense
than u8 the motherboard side code defined the functions
with.

Change-Id: I8ee83aa2833408ad163c9011a076e08578f3ca6f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Kyösti Mälkki 2018-06-02 14:52:25 +03:00 committed by Patrick Georgi
parent 975da840d0
commit 2d7825b0fc
16 changed files with 26 additions and 33 deletions

View File

@ -21,8 +21,8 @@
#include <cpu/amd/mtrr.h>
#include <southbridge/amd/common/amd_defs.h>
#include <device/pci_def.h>
#include "southbridge/amd/rs780/rs780.h"
u8 is_dev3_present(void);
void set_pcie_dereset(void);
void set_pcie_reset(void);
@ -53,7 +53,7 @@ void set_pcie_reset(void)
{
}
u8 is_dev3_present(void)
int is_dev3_present(void)
{
return 0;
}

View File

@ -22,9 +22,8 @@
#include <device/pci_def.h>
#include <southbridge/amd/common/amd_defs.h>
#include <southbridge/amd/sb800/sb800.h>
#include "southbridge/amd/rs780/rs780.h"
u8 is_dev3_present(void);
void set_pcie_dereset(void);
void set_pcie_reset(void);
@ -70,7 +69,7 @@ void set_pcie_reset(void)
/* GPIO 50h reset PCIe slot */
}
u8 is_dev3_present(void)
int is_dev3_present(void)
{
return 0;
}

View File

@ -22,10 +22,10 @@
#include <device/pci_def.h>
#include "southbridge/amd/sb700/sb700.h"
#include "southbridge/amd/sb700/smbus.h"
#include "southbridge/amd/rs780/rs780.h"
void set_pcie_dereset(void);
void set_pcie_reset(void);
u8 is_dev3_present(void);
/*
* Mahogany uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to
* pull it up before training the slot.
@ -85,7 +85,7 @@ static void get_ide_dma66(void)
}
#endif /* get_ide_dma66() */
u8 is_dev3_present(void)
int is_dev3_present(void)
{
return 0;
}

View File

@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include "southbridge/amd/sb700/smbus.h"
#include "southbridge/amd/rs780/rs780.h"
#define ADT7461_ADDRESS 0x4C
#define ARA_ADDRESS 0x0C /* Alert Response Address */
@ -35,7 +36,6 @@
void set_pcie_dereset(void);
void set_pcie_reset(void);
u8 is_dev3_present(void);
void set_pcie_dereset()
{
@ -91,7 +91,7 @@ void set_pcie_reset()
/*
* justify the dev3 is exist or not
*/
u8 is_dev3_present(void)
int is_dev3_present(void)
{
u16 word;
struct device *sm_dev;

View File

@ -22,11 +22,11 @@
#include <device/pci_def.h>
#include "southbridge/amd/sb700/sb700.h"
#include "southbridge/amd/sb700/smbus.h"
#include "southbridge/amd/rs780/rs780.h"
void set_pcie_dereset(void);
void set_pcie_reset(void);
u8 is_dev3_present(void);
void set_pcie_dereset()
{
@ -84,7 +84,7 @@ void set_pcie_reset()
* NOTE: This just copied from AMD Tilapia code.
* It is completly unknown if it will work at all for this board.
*/
u8 is_dev3_present(void)
int is_dev3_present(void)
{
u16 word;
struct device *sm_dev;

View File

@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include "southbridge/amd/sb700/sb700.h"
#include "southbridge/amd/sb700/smbus.h"
#include "southbridge/amd/rs780/rs780.h"
#define ADT7461_ADDRESS 0x4C
#define ARA_ADDRESS 0x0C /* Alert Response Address */
@ -35,7 +36,6 @@
void set_pcie_dereset(void);
void set_pcie_reset(void);
u8 is_dev3_present(void);
void set_pcie_dereset()
{
@ -93,7 +93,7 @@ void set_pcie_reset()
* NOTE: This just copied from AMD Tilapia code.
* It is completly unknown it it will work at all for ASUS M4A785-M.
*/
u8 is_dev3_present(void)
int is_dev3_present(void)
{
u16 word;
struct device *sm_dev;

View File

@ -21,8 +21,8 @@
#include <cpu/amd/mtrr.h>
#include <southbridge/amd/common/amd_defs.h>
#include <device/pci_def.h>
#include "southbridge/amd/rs780/rs780.h"
u8 is_dev3_present(void);
void set_pcie_dereset(void);
void set_pcie_reset(void);
@ -53,7 +53,7 @@ void set_pcie_reset(void)
{
}
u8 is_dev3_present(void)
int is_dev3_present(void)
{
return 0;
}

View File

@ -21,8 +21,8 @@
#include <cpu/amd/mtrr.h>
#include <southbridge/amd/common/amd_defs.h>
#include <device/pci_def.h>
#include "southbridge/amd/rs780/rs780.h"
u8 is_dev3_present(void);
void set_pcie_dereset(void);
void set_pcie_reset(void);
@ -53,7 +53,7 @@ void set_pcie_reset(void)
{
}
u8 is_dev3_present(void)
int is_dev3_present(void)
{
return 1;
}

View File

@ -22,10 +22,10 @@
#include <device/pci_def.h>
#include "southbridge/amd/sb700/sb700.h"
#include "southbridge/amd/sb700/smbus.h"
#include "southbridge/amd/rs780/rs780.h"
void set_pcie_dereset(void);
void set_pcie_reset(void);
int is_dev3_present(void);
void set_pcie_dereset()
{

View File

@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include "southbridge/amd/sb700/sb700.h"
#include "southbridge/amd/sb700/smbus.h"
#include "southbridge/amd/rs780/rs780.h"
#define ADT7461_ADDRESS 0x4C
#define ARA_ADDRESS 0x0C /* Alert Response Address */
@ -35,7 +36,6 @@
void set_pcie_dereset(void);
void set_pcie_reset(void);
int is_dev3_present(void);
void set_pcie_dereset()
{

View File

@ -23,10 +23,10 @@
#include <device/pci_def.h>
#include "southbridge/amd/sb700/sb700.h"
#include "southbridge/amd/sb700/smbus.h"
#include "southbridge/amd/rs780/rs780.h"
void set_pcie_dereset(void);
void set_pcie_reset(void);
u8 is_dev3_present(void);
/*
* ma78gm-us2h uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to
* pull it up before training the slot.
@ -58,7 +58,7 @@ void set_pcie_reset()
}
u8 is_dev3_present(void)
int is_dev3_present(void)
{
return 0;
}

View File

@ -22,10 +22,10 @@
#include <device/pci_def.h>
#include "southbridge/amd/sb700/sb700.h"
#include "southbridge/amd/sb700/smbus.h"
#include "southbridge/amd/rs780/rs780.h"
void set_pcie_dereset(void);
void set_pcie_reset(void);
u8 is_dev3_present(void);
/* TODO - Need to find GPIO for PCIE slot.
* Kino uses GPIO ? as PCIe slot reset, GPIO? as GFX slot reset. We need to
* pull it up before training the slot.
@ -40,7 +40,7 @@ void set_pcie_reset()
/* PCIE slot not yet supported.*/
}
u8 is_dev3_present(void)
int is_dev3_present(void)
{
return 0;
}

View File

@ -23,10 +23,10 @@
#include <device/pci_def.h>
#include "southbridge/amd/sb700/sb700.h"
#include "southbridge/amd/sb700/smbus.h"
#include "southbridge/amd/rs780/rs780.h"
void set_pcie_dereset(void);
void set_pcie_reset(void);
u8 is_dev3_present(void);
/*
* the board uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to
@ -87,7 +87,7 @@ static void get_ide_dma66(void)
}
#endif /* get_ide_dma66() */
u8 is_dev3_present(void)
int is_dev3_present(void)
{
return 0;
}

View File

@ -26,13 +26,6 @@
void set_pcie_reset(void);
void set_pcie_dereset(void);
u8 is_dev3_present(void);
/* 780 board use this function*/
u8 is_dev3_present(void)
{
return 0;
}
/*
* TODO: Add the routine info of each PCIE_RESET_L.

View File

@ -35,7 +35,7 @@
#include <delay.h>
#include <cpu/x86/msr.h>
#include "rs780.h"
extern int is_dev3_present(void);
void set_pcie_reset(void);
void set_pcie_dereset(void);

View File

@ -222,5 +222,6 @@ int is_family10h(void);
void enable_rs780_dev8(void);
void rs780_early_setup(void);
void rs780_htinit(void);
int is_dev3_present(void);
#endif /* __RS780_H__ */