Documentation/Intel: Update the documentation
index.html: * Separate the sections on the main page * Move the documentation links to the main page * Add links for FSP 1.0 and 2.0 specifications * Add link for UEFI specifications * Add link to MinnowBoard MAX coreboot fsp1_1.html: * Use Integration instead of Documentation SoC/quark.html: * Move documentation to main page * Update build instructions for CorebootPayloadPkg * Remove FatPkg since it is now part of edk2 tree * Add source location for QuarkFspPkg * Add build instructions for QuarkFspPkg TEST=None Change-Id: I48bd1bf98a6d8bc43bdd3b4c51dfd119a1e0f61b Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/14882 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@ -18,6 +18,8 @@
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<li><a target="_blank" href="soc.html">SoC</a> support</li>
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<li><a target="_blank" href="../fsp1_1.html">FSP 1.1</a> integration</li>
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<li><a target="_blank" href="../Board/board.html">Board</a> support</li>
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<li><a target="_blank" href="#QuarkFsp">Quark™ FSP</a></li>
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<li><a target="_blank" href="#CorebootPayloadPkg">CorebootPayloadPkg</a></li>
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</ul>
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</td>
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</tr>
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@ -29,7 +31,6 @@
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<h1>Quark™ Documentation</h1>
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<ul>
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<li><a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/images/embedded/16x9/edc-quark-block-diagram-16x9.png">Block Diagram</a></li>
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<li>Intel® 64 and IA-32 Architectures <a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf">Software Developer Manual</a></li>
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<li><a target="_blank" href="http://www.intel.com/content/www/us/en/embedded/products/quark/specifications.html">Specifications</a>:
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<ul>
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<li><a target="_blank" href="http://ark.intel.com/products/79084/Intel-Quark-SoC-X1000-16K-Cache-400-MHz">X1000</a>
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@ -42,6 +43,7 @@
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</li>
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</ul>
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</li>
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<li><a target="_blank" href="../index.html#Documentation">More documentation</a></li>
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</ul>
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@ -53,56 +55,18 @@ Build Instructions:
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</p>
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<ol>
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<li>Set up <a href="#BuildEnvironment">build environment</a></li>
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<li>For the Galileo Gen 2, replace the following lines in
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CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc:
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<pre><code> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x03F8
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</code></pre>
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with:
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<pre><code>#
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# Quark configuration
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#
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|1
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#
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# Specify Galileo HSUART1 serial port
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#
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[PcdsPatchableInModule.common]
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xff}
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xA0019000
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|4
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|44236800
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|921600
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|3 # 8-bits, no parity
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable|FALSE
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|1 # Enable FIFO
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|16
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</code></pre>
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</li>
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<li>Build Instructions:
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<ul>
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<li>Linux (assumes GCC48):
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<ol type="A">
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<li>Edit Conf/tools_def.txt to add " -march=i586" to the IA32_CC_FLAGS
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for the GCC compiler being used:
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<pre><code>*_GCC48_IA32_CC_FLAGS = DEF(GCC48_IA32_CC_FLAGS) -Os -march=i586</code></pre>
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</li>
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<li>
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<pre><code>build -p CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc -a IA32 -t GCC48 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 -DDEBUG_PRINT_ERROR_LEVEL=0x80000042
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<li>Linux (assumes GCC48):
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<pre><code>build -p CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc -a IA32 \
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-t GCC48 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 \
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-DDEBUG_PRINT_ERROR_LEVEL=0x80000042 -DSHELL_TYPE=BUILD_SHELL \
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-DMAX_LOGICAL_PROCESSORS=1
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ls Build/CorebootPayloadPkgIA32/DEBUG_GCC48/FV/UEFIPAYLOAD.fd
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</code></pre>
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</li>
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</ol>
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</li>
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<li>Windows:
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<pre><code>build -p CorebootPayloadPkg\CorebootPayloadPkgIa32.dsc -a IA32 -t VS2012x86 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 -DDEBUG_PRINT_ERROR_LEVEL=0x80000042
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dir Build\CorebootPayloadPkgIA32\DEBUG_VS2012x86\FV\UEFIPAYLOAD.fd
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</li>
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<li>Windows (assumes Visual Studio 2015):
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<pre><code>build -p CorebootPayloadPkg\CorebootPayloadPkgIa32.dsc -a IA32 -t VS2015x86 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 -DDEBUG_PRINT_ERROR_LEVEL=0x80000042 -DSHELL_TYPE=BUILD_SHELL -DMAX_LOGICAL_PROCESSORS=1
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dir Build\CorebootPayloadPkgIA32\DEBUG_VS2015x86\FV\UEFIPAYLOAD.fd
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</code></pre>
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</li>
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</ul>
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</li>
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<li>In the .config for coreboot, set the following Kconfig values:
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<ul>
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@ -125,7 +89,6 @@ dir Build\CorebootPayloadPkgIA32\DEBUG_VS2012x86\FV\UEFIPAYLOAD.fd
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<li>Get the EDK2 sources:
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<ol type="A">
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<li>EDK2: git clone <a target="_blank" href="https://github.com/tianocore/edk2.git">https://github.com/tianocore/edk2.git</a></li>
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<li>EDK2-FatPkg: git clone <a target="_blank" href="https://github.com/tianocore/edk2-FatPkg.git">https://github.com/tianocore/edk2-FatPkg.git</a> FatPkg</li>
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<li>EDK2-non-osi: git clone <a target="_blank" href="https://github.com/tianocore/edk2-non-osi.git">https://github.com/tianocore/edk2-non-osi.git</a></li>
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<li>Win32 BaseTools: git clone <a target="_blank" href="https://github.com/tianocore/edk2-BaseTools-win32.git">https://github.com/tianocore/edk2-BaseTools-win32.git</a></li>
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</ol>
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<ul>
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<li>Linux:
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<pre><code>export WORKSPACE=$PWD
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export PACKAGES_PATH="$PWD/edk2:$PWD/FatPkg:$PWD/edk2-non-osi"
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export PACKAGES_PATH="$PWD/edk2:$PWD/edk2-non-osi"
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cd edk2
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export WORKSPACE=$PWD
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. edksetup.sh
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</li>
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<li>Windows:
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<pre><code>set WORKSPACE=%CD%
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set PACKAGES_PATH=%WORKSPACE%\edk2;%WORKSPACE%\FatPkg;%WORKSPACE%\edk2-non-osi
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set PACKAGES_PATH=%WORKSPACE%\edk2;%WORKSPACE%\edk2-non-osi
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set EDK_TOOLS_BIN=%WORKSPACE%\edk2-BaseTools-win32
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cd edk2
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edksetup.bat
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</li>
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</ol>
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<p>
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EDK2 Documentation:
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</p>
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<ul>
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<li>Build <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/Build_Spec_1_26.pdf">V1.26</a></li>
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<li>Coding Standards <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/CCS_2_1_Draft.pdf">V2.1</a></li>
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<li>DEC <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/DEC_Spec_1_25.pdf">V1.25</a></li>
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<li>DSC <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/DSC_Spec_1_26.pdf">V1.26</a></li>
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<li><a target="_blank" href="https://github.com/tianocore/tianocore.github.io/wiki/UEFI-Driver-Writer's-Guide">Driver Writer's Guide</a></li>
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<li>Expression Syntax <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/ExpressionSyntax_1.1.pdf">V1.1</a></li>
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<li>FDF <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/FDF_Spec_1_26.pdf">V1.26</a></li>
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<li>INF <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/INF_Spec_1_25.pdf">V1.25</a></li>
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<li>PCD <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/PCD_Infrastructure.pdf">PCD</a>V0.55</li>
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<li>UNI <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/UNI_File_Spec_v1_2_Errata_A.pdf">V1.2 Errata A</a></li>
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<li>VRF <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/VFR_1_9.pdf">V1.9</a></li>
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</ul>
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<hr>
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<h1>Quark™ FSP</h1>
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<h1><a name="QuarkFsp">Quark™ FSP</a></h1>
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<p>
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Documentation:
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Getting the Quark FSP source:
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</p>
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<ol>
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<li>Set up an EDK-II <a href="#BuildEnvironment">Build Environment</a></li>
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<li>cd edk2</li>
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<li>mkdir QuarkFspPkg</li>
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<li>cd QuarkFspPkg</li>
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<li>Use git to clone <a target="_blank" href="https://review.gerrithub.io/#/admin/projects/LeeLeahy/quarkfsp">QuarkFspPkg</a> into the QuarkFpsPkg directory (.)</li>
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</ol>
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<p>
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Building QuarkFspPkg:
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</p>
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<ul>
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<li>Intel® Firmware Support Package External Architecture Specification <a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v1-1.pdf">V1.1</a></li>
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<li>Linux: QuarkFspPkg/BuildFsp.sh -d32</li>
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<li>Windows: QuarkFspPkg/BuildFsp.bat -d32</li>
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</ul>
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<hr>
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<p>Modified: 29 February 2016</p>
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<p>Modified: 17 May 2016</p>
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</body>
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</html>
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</html>
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</head>
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<body>
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<h1>x86 FSP 1.1 Development</h1>
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<h1>x86 FSP 1.1 Integration</h1>
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<p>
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Firmware Support Package (FSP) development requires System-on-a-Chip (SoC)
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Firmware Support Package (FSP) integration requires System-on-a-Chip (SoC)
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and board support. The combined steps are listed
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<a target="_blank" href="development.html">here</a>.
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The development steps for FSP are listed below:
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<hr>
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<p>Modified: 31 January 2016</p>
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<p>Modified: 17 May 2016</p>
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</body>
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</html>
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</html>
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<h1>Intel® x86 Boards</h1>
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<ul>
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<li><a target="_blank" href="Board/galileo.html">Galileo</a></li>
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<li><a target="_blank" href="http://wiki.minnowboard.org/Coreboot">MinnowBoard MAX</a></li>
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</ul>
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<hr>
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<h1>x86 coreboot Development</h1>
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<ul>
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<li>Get the <a target="_blank" href="https://www.coreboot.org/Git">coreboot source</li>
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<li><a target="_blank" href="Board/board.html">Board</a> support</li>
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</ul>
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<hr>
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<h1>Payload Development</h1>
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<ul>
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<li><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a>
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<h1>Documentation</h1>
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<hr>
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<h1><a name="Documentation">Documentation</a></h1>
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<ul>
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<li><a target="_blank" href="http://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdf">ACPI 6.0 Specification</a></li>
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<li><a target="_blank" href="http://www.uefi.org/specifications">ACPI Specifications</a></li>
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<li>Intel® 64 and IA-32 Architectures <a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf">Software Developer Manual</a></li>
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<li><a target="_blank" href="http://www.uefi.org/specifications">UEFI Specifications</a></li>
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</ul>
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<h2><a name="Edk2Documentation">EDK-II Documentation</a></h2>
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<ul>
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<li>Build <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/Build_Spec_1_26.pdf">V1.26</a></li>
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<li>Coding Standards <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/CCS_2_1_Draft.pdf">V2.1</a></li>
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<li>DEC <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/DEC_Spec_1_25.pdf">V1.25</a></li>
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<li>DSC <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/DSC_Spec_1_26.pdf">V1.26</a></li>
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<li><a target="_blank" href="https://github.com/tianocore/tianocore.github.io/wiki/UEFI-Driver-Writer's-Guide">Driver Writer's Guide</a></li>
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<li>Expression Syntax <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/ExpressionSyntax_1.1.pdf">V1.1</a></li>
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<li>FDF <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/FDF_Spec_1_26.pdf">V1.26</a></li>
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<li>INF <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/INF_Spec_1_25.pdf">V1.25</a></li>
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<li>PCD <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/PCD_Infrastructure.pdf">PCD</a>V0.55</li>
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<li>UNI <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/UNI_File_Spec_v1_2_Errata_A.pdf">V1.2 Errata A</a></li>
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<li>VRF <a target="_blank" href="https://github.com/tianocore-docs/Docs/raw/master/Specifications/VFR_1_9.pdf">V1.9</a></li>
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</ul>
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<h2><a name="FspDocumentation">FSP Documentation</a></h2>
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<ul>
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<li>Intel® Firmware Support Package External Architecture Specification <a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v2.pdf">V2.0</a></li>
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<li>Intel® Firmware Support Package External Architecture Specification <a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v1-1.pdf">V1.1</a></li>
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<li>Intel® Firmware Support Package External Architecture Specification <a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec.pdf">V1.0</a></li>
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</ul>
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<hr>
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<p>Modified: 28 February 2016</p>
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<p>Modified: 17 May 2016</p>
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</body>
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</html>
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</html>
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