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soc/amd/mendocino/acpi: Add support for shared TPM_I2C controller 

There are platforms equipped with AMD SoC where I2C3 controller
connected to TPM device is shared between X86 and PSP. In order to
handle this, PSP acts as an I2C-arbitrator, where x86 (kernel) sends
acquire and release requests to be accepted by PSP.

Introduce new CONFIG for Mendocino SoCs similar to what we have for
Cezanne.

BUG=b:241878652
BRANCH=none

Signed-off-by: Jan Dabros <jsd@semihalf.com>
Change-Id: I015a24715271d2b26c0bd3c9425e20fb2987a954
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67674
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Jan Dabros 2022-09-15 07:36:43 +00:00 committed by Martin L Roth
parent e8097f7a28
commit 2d9e96a5ab
1 changed files with 7 additions and 0 deletions
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7
src/soc/amd/mendocino/acpi/mmio.asl
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@ -327,7 +327,11 @@ Device (I2C2) {
Device (I2C3)
{
#if CONFIG(SOC_AMD_COMMON_BLOCK_I2C3_TPM_SHARED_WITH_PSP)
Name (_HID, "AMDI0019")
#else
Name (_HID, "AMDI0010")
#endif
Name (_UID, 0x3)
Method (_CRS, 0) {
Local0 = ResourceTemplate() {
@ -358,7 +362,10 @@ Device (I2C3)
Return (0x0F)
}
/* If this device is shared with PSP, then PSP takes care of power management */
#if !CONFIG(SOC_AMD_COMMON_BLOCK_I2C3_TPM_SHARED_WITH_PSP)
AOAC_DEVICE(FCH_AOAC_DEV_I2C3, 0)
#endif
}
Device (MISC)