mainboard/google/octopus: configure EC_AP_INT_ODL

Enable the EC_AP_INT_ODL interrupt on GPIO_134 for all octopus boards
that support it. Also removing unnecessary IO standby support since we
don't use this pin to wake up the SoC.

BRANCH=octopus
BUG=b:122552125,b:120679547
TEST=CTS tests with changes

Change-Id: I018864ae5fa400372b5b443e49828e8202b9aa4d
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://review.coreboot.org/c/30788
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jett Rink 2019-01-09 09:42:07 -07:00 committed by Martin Roth
parent 835f5cf23a
commit 2dbe51a17c
12 changed files with 18 additions and 23 deletions

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@ -194,7 +194,9 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_132, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* HV_DDI1_HPD */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_132, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* HV_DDI1_HPD */
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_133, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* HV_EDP_HPD */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_133, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* HV_EDP_HPD */
PAD_NC(GPIO_134, NONE),/* GPIO_134 -- EC_AP_INT_ODL */ /* EC_AP_INT_ODL */
PAD_CFG_GPI_APIC_LOW(GPIO_134, NONE, DEEP),
/* GPIO_135 -- TRACKPAD_INT1_1V8_ODL */ /* GPIO_135 -- TRACKPAD_INT1_1V8_ODL */
PAD_CFG_GPI_IRQ_WAKE(GPIO_135, NONE, DEEP, LEVEL, INVERT), PAD_CFG_GPI_IRQ_WAKE(GPIO_135, NONE, DEEP, LEVEL, INVERT),
PAD_CFG_GPI_APIC_IOS(GPIO_136, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),/* GPIO_136 -- PMIC_PCH_INT_ODL */ PAD_CFG_GPI_APIC_IOS(GPIO_136, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),/* GPIO_136 -- PMIC_PCH_INT_ODL */

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@ -18,4 +18,7 @@
#include <baseboard/ec.h> #include <baseboard/ec.h>
/* Enable EC sync interrupt, EC_SYNC_IRQ is defined in variant/gpio.h */
#define EC_ENABLE_SYNC_IRQ
#endif #endif

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@ -18,4 +18,7 @@
#include <baseboard/gpio.h> #include <baseboard/gpio.h>
/* EC sync irq is GPP_134_IRQ */
#define EC_SYNC_IRQ GPIO_134_IRQ
#endif /* MAINBOARD_GPIO_H */ #endif /* MAINBOARD_GPIO_H */

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@ -195,7 +195,9 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_132, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* HV_DDI1_HPD */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_132, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* HV_DDI1_HPD */
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_133, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* HV_EDP_HPD */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_133, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* HV_EDP_HPD */
PAD_NC(GPIO_134, NONE),/* GPIO_134 -- unused */ /* EC_AP_INT_ODL */
PAD_CFG_GPI_APIC_LOW(GPIO_134, NONE, DEEP),
PAD_CFG_GPI_IRQ_WAKE(GPIO_135, NONE, DEEP, LEVEL, INVERT),/* GPIO_135 -- TRACKPAD_INT1_1V8_ODL */ PAD_CFG_GPI_IRQ_WAKE(GPIO_135, NONE, DEEP, LEVEL, INVERT),/* GPIO_135 -- TRACKPAD_INT1_1V8_ODL */
PAD_CFG_GPI_APIC_IOS(GPIO_136, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),/* GPIO_136 -- PMIC_PCH_INT_ODL */ PAD_CFG_GPI_APIC_IOS(GPIO_136, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),/* GPIO_136 -- PMIC_PCH_INT_ODL */
PAD_CFG_GPI_APIC_IOS(GPIO_137, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_137 -- HP_INT_ODL */ PAD_CFG_GPI_APIC_IOS(GPIO_137, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_137 -- HP_INT_ODL */

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@ -84,4 +84,7 @@
#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */ #define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */
#define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */ #define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */
/* Enable EC sync interrupt, EC_SYNC_IRQ is defined in baseboard/gpio.h */
#define EC_ENABLE_SYNC_IRQ
#endif #endif

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@ -39,4 +39,7 @@
#define MEM_CONFIG2 GPIO_70 #define MEM_CONFIG2 GPIO_70
#define MEM_CONFIG3 GPIO_71 #define MEM_CONFIG3 GPIO_71
/* EC sync irq is GPP_134_IRQ */
#define EC_SYNC_IRQ GPIO_134_IRQ
#endif /* BASEBOARD_GPIO_H */ #endif /* BASEBOARD_GPIO_H */

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@ -22,10 +22,6 @@
static const struct pad_config default_override_table[] = { static const struct pad_config default_override_table[] = {
PAD_NC(GPIO_104, UP_20K), PAD_NC(GPIO_104, UP_20K),
/* CAM_SOC_EC_SYNC */
PAD_CFG_GPI_APIC_IOS(GPIO_134, NONE, DEEP, LEVEL, INVERT, TxDRxE,
DISPUPD),
/* EN_PP3300_TOUCHSCREEN */ /* EN_PP3300_TOUCHSCREEN */
PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0, PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0,
DISPUPD), DISPUPD),

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@ -18,7 +18,4 @@
#include <baseboard/ec.h> #include <baseboard/ec.h>
/* Enable EC sync interrupt, EC_SYNC_IRQ is defined in variant/gpio.h */
#define EC_ENABLE_SYNC_IRQ
#endif #endif

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@ -18,7 +18,4 @@
#include <baseboard/gpio.h> #include <baseboard/gpio.h>
/* EC sync irq is GPP_134_IRQ */
#define EC_SYNC_IRQ GPIO_134_IRQ
#endif /* MAINBOARD_GPIO_H */ #endif /* MAINBOARD_GPIO_H */

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@ -38,9 +38,6 @@ static const struct pad_config default_override_table[] = {
/* PCIE_CLKREQ3_B -- unused */ /* PCIE_CLKREQ3_B -- unused */
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_122, UP_20K, DEEP, NF1, HIZCRx1, ENPU), PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_122, UP_20K, DEEP, NF1, HIZCRx1, ENPU),
/* CAM_SOC_EC_SYNC */
PAD_CFG_GPI_APIC_IOS(GPIO_134, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE,
DISPUPD),
PAD_NC(GPIO_138, UP_20K), /* PEN_PDCT_ODL -- unused */ PAD_NC(GPIO_138, UP_20K), /* PEN_PDCT_ODL -- unused */
PAD_NC(GPIO_139, UP_20K), /* PEN_INT_ODL -- unused */ PAD_NC(GPIO_139, UP_20K), /* PEN_INT_ODL -- unused */

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@ -28,10 +28,6 @@ static const struct pad_config default_override_table[] = {
PAD_NC(GPIO_67, UP_20K), PAD_NC(GPIO_67, UP_20K),
PAD_NC(GPIO_117, UP_20K), PAD_NC(GPIO_117, UP_20K),
/* CAM_SOC_EC_SYNC */
PAD_CFG_GPI_APIC_IOS(GPIO_134, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE,
DISPUPD),
PAD_NC(GPIO_138, DN_20K), PAD_NC(GPIO_138, DN_20K),
PAD_NC(GPIO_139, DN_20K), PAD_NC(GPIO_139, DN_20K),
PAD_NC(GPIO_140, UP_20K), PAD_NC(GPIO_140, UP_20K),

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@ -21,10 +21,6 @@
static const struct pad_config default_override_table[] = { static const struct pad_config default_override_table[] = {
PAD_NC(GPIO_104, UP_20K), PAD_NC(GPIO_104, UP_20K),
/* CAM_SOC_EC_SYNC */
PAD_CFG_GPI_APIC_IOS(GPIO_134, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE,
DISPUPD),
/* EN_PP3300_TOUCHSCREEN */ /* EN_PP3300_TOUCHSCREEN */
PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0, PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0,
DISPUPD), DISPUPD),