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ibexpeak: Fix timings for IDE mode. 

Change-Id: I3c89bb633c32a2c2db349cb4fcbe1ed1c8deb5af
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4657
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Vladimir Serbinenko 2014-01-11 03:40:08 +01:00
parent 11a7c84f85
commit 2dd601efaf
1 changed files with 9 additions and 14 deletions
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23
src/southbridge/intel/ibexpeak/sata.c
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@ -75,16 +75,14 @@ static void sata_init(struct device *dev)
pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE |
IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS); IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS);
pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE | pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE |
IDE_ISP_3_CLOCKS | IDE_RCT_1_CLOCKS | IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS);
IDE_PPE0 | IDE_IE0 | IDE_TIME0);
/* Sync DMA */ /* Sync DMA */
pci_write_config16(dev, IDE_SDMA_CNT, IDE_SSDE0); pci_write_config16(dev, IDE_SDMA_CNT, 0);
pci_write_config16(dev, IDE_SDMA_TIM, 0x0200); pci_write_config16(dev, IDE_SDMA_TIM, 0);
/* Set IDE I/O Configuration */ /* Set IDE I/O Configuration */
reg32 = reg32 = SIG_MODE_PRI_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0;
SIG_MODE_PRI_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0;
pci_write_config32(dev, IDE_CONFIG, reg32); pci_write_config32(dev, IDE_CONFIG, reg32);
/* Port enable */ /* Port enable */
@ -181,19 +179,16 @@ static void sata_init(struct device *dev)
/* Set timings */ /* Set timings */
pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE |
IDE_ISP_3_CLOCKS | IDE_RCT_1_CLOCKS | IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS);
IDE_PPE0 | IDE_IE0 | IDE_TIME0);
pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE | pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE |
IDE_SITRE | IDE_ISP_3_CLOCKS | IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS);
IDE_RCT_1_CLOCKS | IDE_IE0 | IDE_TIME0);
/* Sync DMA */ /* Sync DMA */
pci_write_config16(dev, IDE_SDMA_CNT, IDE_SSDE0 | IDE_PSDE0); pci_write_config16(dev, IDE_SDMA_CNT, 0);
pci_write_config16(dev, IDE_SDMA_TIM, 0x0201); pci_write_config16(dev, IDE_SDMA_TIM, 0);
/* Set IDE I/O Configuration */ /* Set IDE I/O Configuration */
reg32 = reg32 = SIG_MODE_PRI_NORMAL;
SIG_MODE_PRI_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0;
pci_write_config32(dev, IDE_CONFIG, reg32); pci_write_config32(dev, IDE_CONFIG, reg32);
/* Port enable */ /* Port enable */