mb/google/poppy/variant/nocturne: update PL2 based on CPU sku
This patch adds a function to overwrite PL2 setting based on CPU sku. From doc #594883, PL2 is 18W for AML-Y. BUG=b:110890675 BRANCH=None TEST=emerge-nocturne coreboot chromeos-bootimage & test with AML-Y and KBL-Y skus. Change-Id: Idfdc0c2434fdef56a7c25df05e640837a5096973 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/27997 Reviewed-by: Caveh Jalali <caveh@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -19,3 +19,4 @@ romstage-y += memory.c
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ramstage-y += gpio.c
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ramstage-y += nhlt.c
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ramstage-y += mainboard.c
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@ -0,0 +1,46 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2018 Google Inc.
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* Copyright (C) 2018 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <baseboard/variants.h>
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#include <chip.h>
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#include <device/device.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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/* PL2 limit in watts for AML and KBL */
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#define PL2_AML 18
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#define PL2_KBL 15
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static uint32_t get_pl2(void)
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{
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uint16_t id;
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id = pci_read_config16(SA_DEV_IGD, PCI_DEVICE_ID);
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/* Assume we only have KLB-Y and AML-Y SKUs */
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if (id == PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM)
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return PL2_KBL;
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return PL2_AML;
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}
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/* Override dev tree settings per board */
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void variant_devtree_update(void)
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{
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struct device *root = SA_DEV_ROOT;
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config_t *cfg = root->chip_info;
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/* Update PL2 based on CPU */
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cfg->tdp_pl2_override = get_pl2();
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}
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