mb/prodrive/atlas: Add Kconfig option to enable SaGv
It turns out that one can use Kconfig options to specify values for devicetree options, as long as the resulting expression is a compile time constant. Use this to configure SaGv for Atlas: enable it by default, but allow SaGv to be disabled manually for convenience when testing. Enabling SaGv makes MRC train the RAM multiple times, which takes a significant amount of time. For further info on SAGV on ADL, please refer to Intel Doc 655258 (Alder Lake Datasheet) section 5.1.3.2. Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com> Signed-off-by: Angel Pons <th3fanbus@gmail.com> Change-Id: I3c6ac25d414122c408f2348d12dba8dce909e567 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67412 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -16,6 +16,10 @@ config BOARD_PRODRIVE_ATLAS_BASEBOARD
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if BOARD_PRODRIVE_ATLAS_BASEBOARD
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if BOARD_PRODRIVE_ATLAS_BASEBOARD
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config ATLAS_ENABLE_SAGV
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bool "Enable SaGv"
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default y
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config MAINBOARD_FAMILY
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config MAINBOARD_FAMILY
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string
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string
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default "PRODRIVE_ATLAS_SERIES"
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default "PRODRIVE_ATLAS_SERIES"
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@ -14,6 +14,9 @@ chip soc/intel/alderlake
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# EC memory map range is 0x900-0x9ff
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# EC memory map range is 0x900-0x9ff
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register "gen3_dec" = "0x00fc0901"
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register "gen3_dec" = "0x00fc0901"
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# SaGv Configuration
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register "sagv" = "CONFIG(ATLAS_ENABLE_SAGV) ? SaGv_Enabled : SaGv_Disabled"
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# Display configuration (4 DPs)
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# Display configuration (4 DPs)
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register "ddi_ports_config" = "{
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register "ddi_ports_config" = "{
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[DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
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[DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
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