intel/kunimitsu: configure native mode for GPP_E21

GPP_E_21_DDPC_CTRLDATA is pulled low by default.
This causes 2.5mW leakage from 3.3S to GND via R877.
So configuring GPP_E21 in native mode.

BUG=chrome-os-partner:50958
BRANCH=glados
TEST=Build and boot. Measure Power at 3P3S(R955).

Change-Id: I2bdcb698d0b0cd3228c2e59653ac3fb3b1a26951
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d01f932cda44b0b44c5494b316aefc43c8b84c52
Original-Change-Id: Ifd13ea4b16108ef98d09891365f0d17831ab5f65
Original-Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/332369
Original-Commit-Ready: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/14108
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Youvedeep Singh 2016-03-11 11:08:38 +05:30 committed by Martin Roth
parent a613a311b2
commit 2dfdc7746d
1 changed files with 1 additions and 0 deletions

View File

@ -181,6 +181,7 @@ static const struct pad_config gpio_table[] = {
/* DDPB_CTRLCLK */ PAD_CFG_NC(GPP_E18),
/* DDPB_CTRLDATA */ PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1),
/* DDPC_CTRLCLK */ PAD_CFG_NC(GPP_E20),
/* DDPC_CTRLDATA */ PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),
/* DDPD_CTRLCLK */ PAD_CFG_NC(GPP_E22),
/* TCH_PNL_RST */ PAD_CFG_GPO(GPP_E23, 1, DEEP),