mb/starlabs/labtop/tgl: Organise USB ports by hardware port
Group the USB ports by hardware ports, rather than separate USB 2.0 and 3.0 interfaces. This also removes usb3_port[2] as it is not connected and fixes the labelling of usb3_port[0] and usb3_port[1]. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I7923fc00c36687a7f89d863eb0ea4e01a036502d Reviewed-on: https://review.coreboot.org/c/coreboot/+/64703 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
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@ -101,31 +101,26 @@ chip soc/intel/tigerlake
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device pci 12.0 off end # Thermal Subsystem
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device pci 12.6 off end # GSPI #2
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device pci 14.0 on # USB xHCI
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### USB 2.0 Devices
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# Motherboard USB Type C
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register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)"
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register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
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# Motherboard USB 3.0
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register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"
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register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
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# Daughterboard USB 3.0
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register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"
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# Internal Webcam
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register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)"
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# Daughterboard SD Card
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register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)"
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# Internal Bluetooth
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register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)"
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### USB 3.0 Devices
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# Motherboard USB Type C
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register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
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# Motherboard USB 3.0
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"
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# Daughterboard USB 3.0
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register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)"
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### Thunderbolt 4.0 Devices
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# Motherboard Thunderbolt 4.0
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register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
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end
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device pci 14.1 off end # USB xDCI (OTG)
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device pci 14.2 on end # USB xDCI (OTG)
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