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mb/google/fizz/variants/karma: Clear GPP_B4 when entering S5

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Set GPP_B4 to low in S5 to meet touch panel power sequence

BUG=b:124197348
BRANCH=master
TEST=Verify GPP_B4 is low.

Change-Id: I65deb33a45fdc0c0ce64deaa29c2790029dc1d12
Signed-off-by: David Wu <David_Wu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29796
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
David Wu 2018-11-22 20:38:47 +08:00 committed by Patrick Georgi
parent 2c63017ca3
commit 2e2fe3cc91
4 changed files with 36 additions and 0 deletions
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4
src/mainboard/google/fizz/smihandler.c
View file

@ -17,6 +17,7 @@
#include <ec/google/chromeec/smm.h> #include <ec/google/chromeec/smm.h>
#include <soc/smm.h> #include <soc/smm.h>
#include <baseboard/variants.h>
#include <variant/ec.h> #include <variant/ec.h>
void mainboard_smi_espi_handler(void) void mainboard_smi_espi_handler(void)
@ -24,8 +25,11 @@ void mainboard_smi_espi_handler(void)
chromeec_smi_process_events(); chromeec_smi_process_events();
} }
void __weak variant_smi_sleep(u8 slp_typ) {}
void mainboard_smi_sleep(u8 slp_typ) void mainboard_smi_sleep(u8 slp_typ)
{ {
variant_smi_sleep(slp_typ);
chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
MAINBOARD_EC_S5_WAKE_EVENTS); MAINBOARD_EC_S5_WAKE_EVENTS);
} }

2
src/mainboard/google/fizz/variants/baseboard/include/baseboard/variants.h
View file

@ -29,6 +29,8 @@ const struct pad_config *variant_early_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num); const struct cros_gpio *variant_cros_gpios(size_t *num);
void variant_smi_sleep(u8 slp_typ);
struct nhlt; struct nhlt;
void variant_nhlt_init(struct nhlt *nhlt); void variant_nhlt_init(struct nhlt *nhlt);
void variant_nhlt_oem_overrides(const char **oem_id, const char **oem_table_id, void variant_nhlt_oem_overrides(const char **oem_id, const char **oem_table_id,

2
src/mainboard/google/fizz/variants/karma/Makefile.inc
View file

@ -2,3 +2,5 @@ bootblock-y += gpio.c
ramstage-y += gpio.c ramstage-y += gpio.c
ramstage-y += nhlt.c ramstage-y += nhlt.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c

28
src/mainboard/google/fizz/variants/karma/smihandler.c Normal file
View file

@ -0,0 +1,28 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2018 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/acpi.h>
#include <baseboard/variants.h>
#include <gpio.h>
#define TS_ENABLE GPP_B4
void variant_smi_sleep(u8 slp_typ)
{
if (slp_typ == ACPI_S5) {
/* Set TS to disable */
gpio_set(TS_ENABLE, 0);
}
}