diff --git a/src/mainboard/asrock/g41c-gs/Kconfig b/src/mainboard/asrock/g41c-gs/Kconfig index ad2fe22a0e..3eb0023426 100644 --- a/src/mainboard/asrock/g41c-gs/Kconfig +++ b/src/mainboard/asrock/g41c-gs/Kconfig @@ -41,6 +41,12 @@ config MAINBOARD_DIR string default "asrock/g41c-gs" +config VARIANT_DIR + string + default "g41c-gs-r2" if BOARD_ASROCK_G41C_GS_R2_0 + default "g41c-gs" if BOARD_ASROCK_G41C_GS + default "g41m-gs" if BOARD_ASROCK_G41M_GS + config MAINBOARD_PART_NUMBER string default "G41C-GS R2.0" if BOARD_ASROCK_G41C_GS_R2_0 diff --git a/src/mainboard/asrock/g41c-gs/Makefile.inc b/src/mainboard/asrock/g41c-gs/Makefile.inc index 0786d6fca5..82e72fbb81 100644 --- a/src/mainboard/asrock/g41c-gs/Makefile.inc +++ b/src/mainboard/asrock/g41c-gs/Makefile.inc @@ -1,4 +1,4 @@ ramstage-y += cstates.c -romstage-y += gpio.c +romstage-y += variants/$(VARIANT_DIR)/gpio.c ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/gpio.c b/src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/gpio.c new file mode 100644 index 0000000000..6299d62dae --- /dev/null +++ b/src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/gpio.c @@ -0,0 +1,115 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Arthur Heymans + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +static const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_GPIO, + .gpio8 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_GPIO, + .gpio10 = GPIO_MODE_GPIO, + .gpio12 = GPIO_MODE_GPIO, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_GPIO, + .gpio15 = GPIO_MODE_GPIO, + .gpio16 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_GPIO, + .gpio20 = GPIO_MODE_GPIO, + .gpio24 = GPIO_MODE_GPIO, + .gpio25 = GPIO_MODE_GPIO, + .gpio26 = GPIO_MODE_GPIO, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio7 = GPIO_DIR_INPUT, + .gpio8 = GPIO_DIR_INPUT, + .gpio9 = GPIO_DIR_INPUT, + .gpio10 = GPIO_DIR_OUTPUT, + .gpio12 = GPIO_DIR_INPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio14 = GPIO_DIR_INPUT, + .gpio15 = GPIO_DIR_OUTPUT, + .gpio16 = GPIO_DIR_OUTPUT, + .gpio18 = GPIO_DIR_OUTPUT, + .gpio20 = GPIO_DIR_OUTPUT, + .gpio24 = GPIO_DIR_OUTPUT, + .gpio25 = GPIO_DIR_OUTPUT, + .gpio26 = GPIO_DIR_INPUT, + .gpio27 = GPIO_DIR_OUTPUT, + .gpio28 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio10 = GPIO_LEVEL_LOW, + .gpio15 = GPIO_LEVEL_LOW, + .gpio16 = GPIO_LEVEL_HIGH, + .gpio18 = GPIO_LEVEL_HIGH, + .gpio20 = GPIO_LEVEL_LOW, + .gpio24 = GPIO_LEVEL_HIGH, + .gpio25 = GPIO_LEVEL_LOW, + .gpio27 = GPIO_LEVEL_LOW, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio0 = GPIO_INVERT, + .gpio6 = GPIO_INVERT, + .gpio12 = GPIO_INVERT, + .gpio13 = GPIO_INVERT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_blink = { +}; + +static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_GPIO, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio38 = GPIO_MODE_GPIO, + .gpio39 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio32 = GPIO_DIR_OUTPUT, + .gpio33 = GPIO_DIR_OUTPUT, + .gpio34 = GPIO_DIR_INPUT, + .gpio38 = GPIO_DIR_INPUT, + .gpio39 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_level = { + .gpio32 = GPIO_LEVEL_HIGH, + .gpio33 = GPIO_LEVEL_HIGH, +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_blink, + .invert = &pch_gpio_set1_invert, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + .level = &pch_gpio_set2_level, + }, +}; diff --git a/src/mainboard/asrock/g41c-gs/variants/g41c-gs/gpio.c b/src/mainboard/asrock/g41c-gs/variants/g41c-gs/gpio.c new file mode 100644 index 0000000000..52cd611982 --- /dev/null +++ b/src/mainboard/asrock/g41c-gs/variants/g41c-gs/gpio.c @@ -0,0 +1,115 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Arthur Heymans + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +static const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_GPIO, + .gpio8 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_GPIO, + .gpio10 = GPIO_MODE_GPIO, + .gpio12 = GPIO_MODE_GPIO, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_GPIO, + .gpio15 = GPIO_MODE_GPIO, + .gpio16 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_GPIO, + .gpio20 = GPIO_MODE_GPIO, + .gpio24 = GPIO_MODE_GPIO, + .gpio25 = GPIO_MODE_GPIO, + .gpio26 = GPIO_MODE_GPIO, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio7 = GPIO_DIR_INPUT, + .gpio8 = GPIO_DIR_INPUT, + .gpio9 = GPIO_DIR_INPUT, + .gpio10 = GPIO_DIR_OUTPUT, + .gpio12 = GPIO_DIR_INPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio14 = GPIO_DIR_INPUT, + .gpio15 = GPIO_DIR_OUTPUT, + .gpio16 = GPIO_DIR_OUTPUT, + .gpio18 = GPIO_DIR_OUTPUT, + .gpio20 = GPIO_DIR_OUTPUT, + .gpio24 = GPIO_DIR_OUTPUT, + .gpio25 = GPIO_DIR_OUTPUT, + .gpio26 = GPIO_DIR_INPUT, + .gpio27 = GPIO_DIR_OUTPUT, + .gpio28 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio10 = GPIO_LEVEL_LOW, + .gpio15 = GPIO_LEVEL_LOW, + .gpio16 = GPIO_LEVEL_HIGH, + .gpio18 = GPIO_LEVEL_LOW, + .gpio20 = GPIO_LEVEL_HIGH, + .gpio24 = GPIO_LEVEL_HIGH, + .gpio25 = GPIO_LEVEL_LOW, + .gpio27 = GPIO_LEVEL_LOW, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio0 = GPIO_INVERT, + .gpio6 = GPIO_INVERT, + .gpio12 = GPIO_INVERT, + .gpio13 = GPIO_INVERT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_blink = { +}; + +static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_GPIO, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio38 = GPIO_MODE_GPIO, + .gpio39 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio32 = GPIO_DIR_OUTPUT, + .gpio33 = GPIO_DIR_OUTPUT, + .gpio34 = GPIO_DIR_INPUT, + .gpio38 = GPIO_DIR_INPUT, + .gpio39 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_level = { + .gpio32 = GPIO_LEVEL_HIGH, + .gpio33 = GPIO_LEVEL_HIGH, +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_blink, + .invert = &pch_gpio_set1_invert, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + .level = &pch_gpio_set2_level, + }, +}; diff --git a/src/mainboard/asrock/g41c-gs/gpio.c b/src/mainboard/asrock/g41c-gs/variants/g41m-gs/gpio.c similarity index 81% rename from src/mainboard/asrock/g41c-gs/gpio.c rename to src/mainboard/asrock/g41c-gs/variants/g41m-gs/gpio.c index b6ccbadae1..cea01cffc3 100644 --- a/src/mainboard/asrock/g41c-gs/gpio.c +++ b/src/mainboard/asrock/g41c-gs/variants/g41m-gs/gpio.c @@ -45,62 +45,35 @@ static const struct pch_gpio_set1 pch_gpio_set1_direction = { .gpio10 = GPIO_DIR_OUTPUT, .gpio12 = GPIO_DIR_INPUT, .gpio13 = GPIO_DIR_INPUT, -#if IS_ENABLED(CONFIG_BOARD_ASROCK_G41M_GS) .gpio14 = GPIO_DIR_OUTPUT, -#else - .gpio14 = GPIO_DIR_INPUT, -#endif .gpio15 = GPIO_DIR_OUTPUT, .gpio16 = GPIO_DIR_OUTPUT, .gpio18 = GPIO_DIR_OUTPUT, .gpio20 = GPIO_DIR_OUTPUT, .gpio24 = GPIO_DIR_OUTPUT, .gpio25 = GPIO_DIR_OUTPUT, -#if IS_ENABLED(CONFIG_BOARD_ASROCK_G41M_GS) .gpio26 = GPIO_DIR_OUTPUT, -#else - .gpio26 = GPIO_DIR_INPUT, -#endif .gpio27 = GPIO_DIR_OUTPUT, .gpio28 = GPIO_DIR_INPUT, }; -#if IS_ENABLED(CONFIG_BOARD_ASROCK_G41C_GS_R2_0) static const struct pch_gpio_set1 pch_gpio_set1_level = { .gpio10 = GPIO_LEVEL_LOW, - .gpio15 = GPIO_LEVEL_LOW, - .gpio16 = GPIO_LEVEL_HIGH, - .gpio18 = GPIO_LEVEL_HIGH, - .gpio20 = GPIO_LEVEL_LOW, - .gpio24 = GPIO_LEVEL_HIGH, - .gpio25 = GPIO_LEVEL_LOW, - .gpio27 = GPIO_LEVEL_LOW, -}; -#else /* BOARD_ASROCK_G41C_GS, BOARD_ASROCK_G41M_GS*/ -static const struct pch_gpio_set1 pch_gpio_set1_level = { - .gpio10 = GPIO_LEVEL_LOW, -#if IS_ENABLED(CONFIG_BOARD_ASROCK_G41M_GS) .gpio14 = GPIO_LEVEL_HIGH, -#endif .gpio15 = GPIO_LEVEL_LOW, .gpio16 = GPIO_LEVEL_HIGH, .gpio18 = GPIO_LEVEL_LOW, .gpio20 = GPIO_LEVEL_HIGH, .gpio24 = GPIO_LEVEL_HIGH, .gpio25 = GPIO_LEVEL_LOW, -#if IS_ENABLED(CONFIG_BOARD_ASROCK_G41M_GS) .gpio26 = GPIO_LEVEL_LOW, -#endif .gpio27 = GPIO_LEVEL_LOW, }; -#endif static const struct pch_gpio_set1 pch_gpio_set1_invert = { .gpio0 = GPIO_INVERT, .gpio6 = GPIO_INVERT, -#if IS_ENABLED(CONFIG_BOARD_ASROCK_G41M_GS) .gpio8 = GPIO_INVERT, -#endif .gpio12 = GPIO_INVERT, .gpio13 = GPIO_INVERT, };