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soc/intel/skylake: Remove dummy CPU_SPECIFIC_OPTIONS 

Change-Id: Iea0e55c6c55635976dad0422470f3927bdc26e35
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76683
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
This commit is contained in:
Elyes Haouas 2023-07-21 07:45:54 +02:00
parent a56a5c2cf8
commit 2e52f0e243
1 changed files with 18 additions and 21 deletions
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39
src/soc/intel/skylake/Kconfig
View File

@ -1,26 +1,5 @@
config SOC_INTEL_COMMON_SKYLAKE_BASE config SOC_INTEL_COMMON_SKYLAKE_BASE
bool bool
config SOC_INTEL_SKYLAKE
bool
select SOC_INTEL_COMMON_SKYLAKE_BASE
config SOC_INTEL_KABYLAKE
bool
select SOC_INTEL_COMMON_SKYLAKE_BASE
config SOC_INTEL_SKYLAKE_LGA1151_V2
bool
select PLATFORM_USES_FSP2_1
select SOC_INTEL_COMMON_SKYLAKE_BASE
select SKYLAKE_SOC_PCH_H
help
Selected by mainboards with a LGA1151 v2 socket and a Z370, H310C or B365 PCH
if SOC_INTEL_COMMON_SKYLAKE_BASE
config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_NHLT select ACPI_NHLT
select ARCH_X86 select ARCH_X86
@ -92,6 +71,24 @@ config CPU_SPECIFIC_OPTIONS
select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT
select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE
config SOC_INTEL_SKYLAKE
bool
select SOC_INTEL_COMMON_SKYLAKE_BASE
config SOC_INTEL_KABYLAKE
bool
select SOC_INTEL_COMMON_SKYLAKE_BASE
config SOC_INTEL_SKYLAKE_LGA1151_V2
bool
select PLATFORM_USES_FSP2_1
select SOC_INTEL_COMMON_SKYLAKE_BASE
select SKYLAKE_SOC_PCH_H
help
Selected by mainboards with a LGA1151 v2 socket and a Z370, H310C or B365 PCH
if SOC_INTEL_COMMON_SKYLAKE_BASE
config MAX_HECI_DEVICES config MAX_HECI_DEVICES
int int
default 5 default 5