diff --git a/src/mainboard/google/drallion/Kconfig b/src/mainboard/google/drallion/Kconfig index 0d31362ac0..6d571dd46e 100644 --- a/src/mainboard/google/drallion/Kconfig +++ b/src/mainboard/google/drallion/Kconfig @@ -13,6 +13,7 @@ config BOARD_GOOGLE_BASEBOARD_DRALLION select HAVE_ACPI_TABLES select HAVE_SPD_IN_CBFS select I2C_TPM + select INTEL_GMA_HAVE_VBT select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_TPM2 diff --git a/src/mainboard/google/drallion/dsdt.asl b/src/mainboard/google/drallion/dsdt.asl index 6e9bf02136..0f503dffd9 100644 --- a/src/mainboard/google/drallion/dsdt.asl +++ b/src/mainboard/google/drallion/dsdt.asl @@ -22,6 +22,7 @@ DefinitionBlock( { #include #include + #include } /* Per board variant mainboard hooks. */ #include diff --git a/src/mainboard/google/drallion/variants/drallion/data.vbt b/src/mainboard/google/drallion/variants/drallion/data.vbt new file mode 100644 index 0000000000..034ad8ca0b Binary files /dev/null and b/src/mainboard/google/drallion/variants/drallion/data.vbt differ diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb index 7f55eaf36f..950dab9c19 100644 --- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb +++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb @@ -220,6 +220,7 @@ chip soc/intel/cannonlake device domain 0 on device pci 00.0 on end # Host Bridge device pci 02.0 on + register "gfx" = "GMA_DEFAULT_PANEL(0)" chip drivers/gfx/generic register "device_count" = "1" register "device[0].name" = ""LCD""