mb/google/drallion: Add VBT, ACPI brightness controls

Enables display backlight control under Windows.
VBT extracted from stock ChromeOS firmware Google_Drallion.12930.543.0.

TEST=build/boot Win11 on drallion, verify OS backlight control
available and functional.

Change-Id: I85065f22b825a7616fa4ac632c42ae7972091e24
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72579
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Matt DeVillier 2023-01-25 14:27:42 -06:00 committed by Felix Held
parent b575397c7f
commit 2e82fcf209
4 changed files with 3 additions and 0 deletions

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@ -13,6 +13,7 @@ config BOARD_GOOGLE_BASEBOARD_DRALLION
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES
select HAVE_SPD_IN_CBFS select HAVE_SPD_IN_CBFS
select I2C_TPM select I2C_TPM
select INTEL_GMA_HAVE_VBT
select INTEL_LPSS_UART_FOR_CONSOLE select INTEL_LPSS_UART_FOR_CONSOLE
select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_TPM2 select MAINBOARD_HAS_TPM2

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@ -22,6 +22,7 @@ DefinitionBlock(
{ {
#include <soc/intel/common/block/acpi/acpi/northbridge.asl> #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl> #include <soc/intel/cannonlake/acpi/southbridge.asl>
#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
} }
/* Per board variant mainboard hooks. */ /* Per board variant mainboard hooks. */
#include <variant/acpi/mainboard.asl> #include <variant/acpi/mainboard.asl>

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@ -220,6 +220,7 @@ chip soc/intel/cannonlake
device domain 0 on device domain 0 on
device pci 00.0 on end # Host Bridge device pci 00.0 on end # Host Bridge
device pci 02.0 on device pci 02.0 on
register "gfx" = "GMA_DEFAULT_PANEL(0)"
chip drivers/gfx/generic chip drivers/gfx/generic
register "device_count" = "1" register "device_count" = "1"
register "device[0].name" = ""LCD"" register "device[0].name" = ""LCD""