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stoneyridge: Fix USB ASL 

Stoney Ridge has one EHCI controller and one XHCI controller.
Also, update the Kahlee and Gardenia mainboards ASL to match.

Change-Id: I5749ca0640796732e74e551147f8c4446317b77e
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/22097
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Marc Jones 2017-10-05 21:56:15 -06:00 committed by Aaron Durbin
parent c866f878bc
commit 2e8476c35d
3 changed files with 5 additions and 44 deletions
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7
src/mainboard/amd/gardenia/acpi/gpe.asl
View File

@ -35,12 +35,7 @@ Scope(\_GPE) { /* Start Scope GPE */
/* USB controller PME# */
Method(_L0B) {
/* DBGO("\\_GPE\\_L0B\n") */
Notify(\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.EHC0, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.XHC0, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
}

7
src/mainboard/google/kahlee/acpi/gpe.asl
View File

@ -39,12 +39,7 @@ Scope (\_GPE)
Method (_L0B)
{
/* DBGO ("\\_GPE\\_L0B\n") */
Notify (\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify (\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify (\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify (\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify (\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify (\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify (\_SB.PCI0.EHC0, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify (\_SB.PCI0.XHC0, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify (\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
}

35
src/soc/amd/stoneyridge/acpi/usb.asl
View File

@ -14,41 +14,12 @@
* GNU General Public License for more details.
*/
/* 0:12.0 - OHCI */
Device(UOH1) {
/* 0:12.0 - EHCI */
Device(EHC0) {
Name(_ADR, 0x00120000)
Name(_PRW, Package() {0x0b, 3})
} /* end UOH1 */
} /* end EHC0 */
/* 0:12.2 - EHCI */
Device(UOH2) {
Name(_ADR, 0x00120002)
Name(_PRW, Package() {0x0b, 3})
} /* end UOH2 */
/* 0:13.0 - OHCI */
Device(UOH3) {
Name(_ADR, 0x00130000)
Name(_PRW, Package() {0x0b, 3})
} /* end UOH3 */
/* 0:13.2 - EHCI */
Device(UOH4) {
Name(_ADR, 0x00130002)
Name(_PRW, Package() {0x0b, 3})
} /* end UOH4 */
/* 0:16.0 - OHCI */
Device(UOH5) {
Name(_ADR, 0x00160000)
Name(_PRW, Package() {0x0b, 3})
} /* end UOH5 */
/* 0:16.2 - EHCI */
Device(UOH6) {
Name(_ADR, 0x00160002)
Name(_PRW, Package() {0x0b, 3})
} /* end UOH5 */
/* 0:10.0 - XHCI 0*/
Device(XHC0) {