soc/amd/*/mca: factor out BERT entry generation to soc/amd/common
Change-Id: I960a2f384f11e4aa5aa2eb0645b6046f9f2f8847 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56283 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held
parent
63e34c4d34
commit
2ecf1561b4
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@ -1 +1,3 @@
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ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_MCA_COMMON) += mca_common.c
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ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_MCA) += mca_bert.c
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ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_MCAX) += mcax_bert.c
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@ -0,0 +1,129 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/mca.h>
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#include <cpu/amd/msr.h>
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#include <cpu/x86/msr.h>
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#include <acpi/acpi.h>
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#include <console/console.h>
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#include <arch/bert_storage.h>
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#include <cper.h>
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#include <types.h>
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static inline size_t mca_report_size_reqd(void)
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{
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size_t size;
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size = sizeof(acpi_generic_error_status_t);
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size += sizeof(acpi_hest_generic_data_v300_t);
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size += sizeof(cper_proc_generic_error_section_t);
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size += sizeof(acpi_hest_generic_data_v300_t);
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size += sizeof(cper_ia32x64_proc_error_section_t);
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/* Check Error */
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size += cper_ia32x64_check_sz();
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/* Context of MCG_CAP, MCG_STAT, MCG_CTL */
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size += cper_ia32x64_ctx_sz_bytype(CPER_IA32X64_CTX_MSR, 3);
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/* Context of MCi_CTL, MCi_STATUS, MCi_ADDR, MCi_MISC */
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size += cper_ia32x64_ctx_sz_bytype(CPER_IA32X64_CTX_MSR, 4);
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/* Context of CTL_MASK */
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size += cper_ia32x64_ctx_sz_bytype(CPER_IA32X64_CTX_MSR, 1);
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return size;
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}
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static enum cper_x86_check_type error_to_chktype(struct mca_bank_status *mci)
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{
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int error = mca_err_type(mci->sts);
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if (error == MCA_ERRTYPE_BUS)
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return X86_PROCESSOR_BUS_CHK;
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if (error == MCA_ERRTYPE_INT)
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return X86_PROCESSOR_MS_CHK;
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if (error == MCA_ERRTYPE_MEM)
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return X86_PROCESSOR_CACHE_CHK;
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if (error == MCA_ERRTYPE_TLB)
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return X86_PROCESSOR_TLB_CHK;
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return X86_PROCESSOR_MS_CHK; /* unrecognized */
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}
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/* Fill additional information in the Generic Processor Error Section. */
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static void fill_generic_section(cper_proc_generic_error_section_t *sec,
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struct mca_bank_status *mci)
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{
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int type = mca_err_type(mci->sts);
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if (type == MCA_ERRTYPE_BUS) /* try to map MCA errors to CPER types */
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sec->error_type = GENPROC_ERRTYPE_BUS;
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else if (type == MCA_ERRTYPE_INT)
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sec->error_type = GENPROC_ERRTYPE_UARCH;
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else if (type == MCA_ERRTYPE_MEM)
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sec->error_type = GENPROC_ERRTYPE_CACHE;
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else if (type == MCA_ERRTYPE_TLB)
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sec->error_type = GENPROC_ERRTYPE_TLB;
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else
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sec->error_type = GENPROC_ERRTYPE_UNKNOWN;
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sec->validation |= GENPROC_VALID_PROC_ERR_TYPE;
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}
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/* Convert an error reported by an MCA bank into BERT information to be reported
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* by the OS. The ACPI driver doesn't recognize/parse the IA32/X64 structure,
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* which is the best method to report MSR context. As a result, add two
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* structures: A "processor generic error" that is parsed, and an IA32/X64 one
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* to capture complete information.
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*
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* Future work may attempt to interpret the specific Family 15h error symptoms
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* found in the MCA registers. This data could enhance the reporting of the
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* Processor Generic section and the failing error/check added to the
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* IA32/X64 section.
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*/
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void build_bert_mca_error(struct mca_bank_status *mci)
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{
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acpi_generic_error_status_t *status;
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acpi_hest_generic_data_v300_t *gen_entry;
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acpi_hest_generic_data_v300_t *x86_entry;
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cper_proc_generic_error_section_t *gen_sec;
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cper_ia32x64_proc_error_section_t *x86_sec;
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cper_ia32x64_proc_error_info_t *chk;
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cper_ia32x64_context_t *ctx;
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if (mca_report_size_reqd() > bert_storage_remaining())
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goto failed;
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status = bert_new_event(&CPER_SEC_PROC_GENERIC_GUID);
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if (!status)
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goto failed;
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gen_entry = acpi_hest_generic_data3(status);
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gen_sec = section_of_acpientry(gen_sec, gen_entry);
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fill_generic_section(gen_sec, mci);
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x86_entry = bert_append_ia32x64(status);
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x86_sec = section_of_acpientry(x86_sec, x86_entry);
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chk = new_cper_ia32x64_check(status, x86_sec, error_to_chktype(mci));
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if (!chk)
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goto failed;
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ctx = cper_new_ia32x64_context_msr(status, x86_sec, IA32_MCG_CAP, 3);
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if (!ctx)
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goto failed;
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ctx = cper_new_ia32x64_context_msr(status, x86_sec, IA32_MC_CTL(mci->bank), 4);
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if (!ctx)
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goto failed;
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ctx = cper_new_ia32x64_context_msr(status, x86_sec, MC_CTL_MASK(mci->bank), 1);
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if (!ctx)
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goto failed;
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return;
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failed:
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/* We're here because of a hardware error, don't break something else */
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printk(BIOS_ERR, "Error: Not enough room in BERT region for Machine Check error\n");
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}
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@ -0,0 +1,129 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/mca.h>
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#include <amdblocks/msr_zen.h>
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#include <cpu/x86/msr.h>
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#include <acpi/acpi.h>
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#include <console/console.h>
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#include <arch/bert_storage.h>
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#include <cper.h>
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#include <types.h>
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/* MISC4 is the last used register in the MCAX banks of Picasso */
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#define MCAX_USED_REGISTERS_PER_BANK (MCAX_MISC4_OFFSET + 1)
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static inline size_t mca_report_size_reqd(void)
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{
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size_t size;
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size = sizeof(acpi_generic_error_status_t);
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size += sizeof(acpi_hest_generic_data_v300_t);
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size += sizeof(cper_proc_generic_error_section_t);
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size += sizeof(acpi_hest_generic_data_v300_t);
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size += sizeof(cper_ia32x64_proc_error_section_t);
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/* Check Error */
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size += cper_ia32x64_check_sz();
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/* Context of MCG_CAP, MCG_STAT, MCG_CTL */
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size += cper_ia32x64_ctx_sz_bytype(CPER_IA32X64_CTX_MSR, 3);
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/* Context of CTL, STATUS, ADDR, MISC0, CONFIG, IPID, SYND, RESERVED, DESTAT, DEADDR,
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MISC1, MISC2, MISC3, MISC4 */
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size += cper_ia32x64_ctx_sz_bytype(CPER_IA32X64_CTX_MSR, MCAX_USED_REGISTERS_PER_BANK);
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/* Context of CTL_MASK */
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size += cper_ia32x64_ctx_sz_bytype(CPER_IA32X64_CTX_MSR, 1);
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return size;
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}
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static enum cper_x86_check_type error_to_chktype(struct mca_bank_status *mci)
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{
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int error = mca_err_type(mci->sts);
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if (error == MCA_ERRTYPE_BUS)
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return X86_PROCESSOR_BUS_CHK;
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if (error == MCA_ERRTYPE_INT)
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return X86_PROCESSOR_MS_CHK;
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if (error == MCA_ERRTYPE_MEM)
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return X86_PROCESSOR_CACHE_CHK;
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if (error == MCA_ERRTYPE_TLB)
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return X86_PROCESSOR_TLB_CHK;
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return X86_PROCESSOR_MS_CHK; /* unrecognized */
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}
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/* Fill additional information in the Generic Processor Error Section. */
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static void fill_generic_section(cper_proc_generic_error_section_t *sec,
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struct mca_bank_status *mci)
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{
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int type = mca_err_type(mci->sts);
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if (type == MCA_ERRTYPE_BUS) /* try to map MCA errors to CPER types */
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sec->error_type = GENPROC_ERRTYPE_BUS;
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else if (type == MCA_ERRTYPE_INT)
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sec->error_type = GENPROC_ERRTYPE_UARCH;
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else if (type == MCA_ERRTYPE_MEM)
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sec->error_type = GENPROC_ERRTYPE_CACHE;
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else if (type == MCA_ERRTYPE_TLB)
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sec->error_type = GENPROC_ERRTYPE_TLB;
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else
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sec->error_type = GENPROC_ERRTYPE_UNKNOWN;
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sec->validation |= GENPROC_VALID_PROC_ERR_TYPE;
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}
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/* Convert an error reported by an MCA bank into BERT information to be reported
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* by the OS. The ACPI driver doesn't recognize/parse the IA32/X64 structure,
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* which is the best method to report MSR context. As a result, add two
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* structures: A "processor generic error" that is parsed, and an IA32/X64 one
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* to capture complete information.
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*/
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void build_bert_mca_error(struct mca_bank_status *mci)
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{
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acpi_generic_error_status_t *status;
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acpi_hest_generic_data_v300_t *gen_entry;
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acpi_hest_generic_data_v300_t *x86_entry;
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cper_proc_generic_error_section_t *gen_sec;
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cper_ia32x64_proc_error_section_t *x86_sec;
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cper_ia32x64_proc_error_info_t *chk;
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cper_ia32x64_context_t *ctx;
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if (mca_report_size_reqd() > bert_storage_remaining())
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goto failed;
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status = bert_new_event(&CPER_SEC_PROC_GENERIC_GUID);
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if (!status)
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goto failed;
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gen_entry = acpi_hest_generic_data3(status);
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gen_sec = section_of_acpientry(gen_sec, gen_entry);
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fill_generic_section(gen_sec, mci);
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x86_entry = bert_append_ia32x64(status);
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x86_sec = section_of_acpientry(x86_sec, x86_entry);
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chk = new_cper_ia32x64_check(status, x86_sec, error_to_chktype(mci));
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if (!chk)
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goto failed;
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ctx = cper_new_ia32x64_context_msr(status, x86_sec, IA32_MCG_CAP, 3);
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if (!ctx)
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goto failed;
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ctx = cper_new_ia32x64_context_msr(status, x86_sec, MCAX_CTL_MSR(mci->bank),
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MCAX_USED_REGISTERS_PER_BANK);
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if (!ctx)
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goto failed;
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ctx = cper_new_ia32x64_context_msr(status, x86_sec, MCA_CTL_MASK_MSR(mci->bank), 1);
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if (!ctx)
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goto failed;
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return;
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failed:
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/* We're here because of a hardware error, don't break something else */
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printk(BIOS_ERR, "Error: Not enough room in BERT region for Machine Check error\n");
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}
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@ -3,7 +3,15 @@
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#ifndef AMD_BLOCK_MCA_H
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#define AMD_BLOCK_MCA_H
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#include <cpu/x86/msr.h>
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struct mca_bank_status {
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unsigned int bank;
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msr_t sts;
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};
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void check_mca(void);
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void mca_check_all_banks(void);
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void build_bert_mca_error(struct mca_bank_status *mci);
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#endif /* AMD_BLOCK_MCA_H */
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@ -2,139 +2,11 @@
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#include <amdblocks/mca.h>
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#include <amdblocks/msr_zen.h>
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#include <amdblocks/reset.h>
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#include <cpu/x86/lapic.h>
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#include <cpu/x86/msr.h>
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#include <acpi/acpi.h>
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#include <console/console.h>
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#include <arch/bert_storage.h>
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#include <cper.h>
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#include <types.h>
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/* MISC4 is the last used register in the MCAX banks of Picasso */
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#define MCAX_USED_REGISTERS_PER_BANK (MCAX_MISC4_OFFSET + 1)
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struct mca_bank_status {
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unsigned int bank;
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msr_t sts;
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};
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static inline size_t mca_report_size_reqd(void)
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{
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size_t size;
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size = sizeof(acpi_generic_error_status_t);
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size += sizeof(acpi_hest_generic_data_v300_t);
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size += sizeof(cper_proc_generic_error_section_t);
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size += sizeof(acpi_hest_generic_data_v300_t);
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size += sizeof(cper_ia32x64_proc_error_section_t);
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/* Check Error */
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size += cper_ia32x64_check_sz();
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/* Context of MCG_CAP, MCG_STAT, MCG_CTL */
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size += cper_ia32x64_ctx_sz_bytype(CPER_IA32X64_CTX_MSR, 3);
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/* Context of CTL, STATUS, ADDR, MISC0, CONFIG, IPID, SYND, RESERVED, DESTAT, DEADDR,
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MISC1, MISC2, MISC3, MISC4 */
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size += cper_ia32x64_ctx_sz_bytype(CPER_IA32X64_CTX_MSR, MCAX_USED_REGISTERS_PER_BANK);
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/* Context of CTL_MASK */
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size += cper_ia32x64_ctx_sz_bytype(CPER_IA32X64_CTX_MSR, 1);
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return size;
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}
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static enum cper_x86_check_type error_to_chktype(struct mca_bank_status *mci)
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{
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int error = mca_err_type(mci->sts);
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if (error == MCA_ERRTYPE_BUS)
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return X86_PROCESSOR_BUS_CHK;
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if (error == MCA_ERRTYPE_INT)
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return X86_PROCESSOR_MS_CHK;
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if (error == MCA_ERRTYPE_MEM)
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return X86_PROCESSOR_CACHE_CHK;
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if (error == MCA_ERRTYPE_TLB)
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return X86_PROCESSOR_TLB_CHK;
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return X86_PROCESSOR_MS_CHK; /* unrecognized */
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}
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/* Fill additional information in the Generic Processor Error Section. */
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static void fill_generic_section(cper_proc_generic_error_section_t *sec,
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struct mca_bank_status *mci)
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{
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int type = mca_err_type(mci->sts);
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if (type == MCA_ERRTYPE_BUS) /* try to map MCA errors to CPER types */
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sec->error_type = GENPROC_ERRTYPE_BUS;
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else if (type == MCA_ERRTYPE_INT)
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sec->error_type = GENPROC_ERRTYPE_UARCH;
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else if (type == MCA_ERRTYPE_MEM)
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sec->error_type = GENPROC_ERRTYPE_CACHE;
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else if (type == MCA_ERRTYPE_TLB)
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sec->error_type = GENPROC_ERRTYPE_TLB;
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else
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sec->error_type = GENPROC_ERRTYPE_UNKNOWN;
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sec->validation |= GENPROC_VALID_PROC_ERR_TYPE;
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}
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/* Convert an error reported by an MCA bank into BERT information to be reported
|
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* by the OS. The ACPI driver doesn't recognize/parse the IA32/X64 structure,
|
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* which is the best method to report MSR context. As a result, add two
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* structures: A "processor generic error" that is parsed, and an IA32/X64 one
|
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* to capture complete information.
|
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*/
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static void build_bert_mca_error(struct mca_bank_status *mci)
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{
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acpi_generic_error_status_t *status;
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acpi_hest_generic_data_v300_t *gen_entry;
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acpi_hest_generic_data_v300_t *x86_entry;
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cper_proc_generic_error_section_t *gen_sec;
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cper_ia32x64_proc_error_section_t *x86_sec;
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cper_ia32x64_proc_error_info_t *chk;
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cper_ia32x64_context_t *ctx;
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if (mca_report_size_reqd() > bert_storage_remaining())
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goto failed;
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status = bert_new_event(&CPER_SEC_PROC_GENERIC_GUID);
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if (!status)
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goto failed;
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gen_entry = acpi_hest_generic_data3(status);
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gen_sec = section_of_acpientry(gen_sec, gen_entry);
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fill_generic_section(gen_sec, mci);
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x86_entry = bert_append_ia32x64(status);
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x86_sec = section_of_acpientry(x86_sec, x86_entry);
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chk = new_cper_ia32x64_check(status, x86_sec, error_to_chktype(mci));
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if (!chk)
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goto failed;
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ctx = cper_new_ia32x64_context_msr(status, x86_sec, IA32_MCG_CAP, 3);
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if (!ctx)
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goto failed;
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ctx = cper_new_ia32x64_context_msr(status, x86_sec, MCAX_CTL_MSR(mci->bank),
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MCAX_USED_REGISTERS_PER_BANK);
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if (!ctx)
|
||||
goto failed;
|
||||
ctx = cper_new_ia32x64_context_msr(status, x86_sec, MCA_CTL_MASK_MSR(mci->bank), 1);
|
||||
if (!ctx)
|
||||
goto failed;
|
||||
|
||||
return;
|
||||
|
||||
failed:
|
||||
/* We're here because of a hardware error, don't break something else */
|
||||
printk(BIOS_ERR, "Error: Not enough room in BERT region for Machine Check error\n");
|
||||
}
|
||||
|
||||
static const char *const mca_bank_name[] = {
|
||||
[0] = "Load-store unit",
|
||||
[1] = "Instruction fetch unit",
|
||||
|
|
|
|||
|
|
@ -5,136 +5,9 @@
|
|||
#include <cpu/amd/msr.h>
|
||||
#include <cpu/x86/lapic.h>
|
||||
#include <cpu/x86/msr.h>
|
||||
#include <acpi/acpi.h>
|
||||
#include <console/console.h>
|
||||
#include <arch/bert_storage.h>
|
||||
#include <cper.h>
|
||||
#include <types.h>
|
||||
|
||||
struct mca_bank_status {
|
||||
unsigned int bank;
|
||||
msr_t sts;
|
||||
};
|
||||
|
||||
static inline size_t mca_report_size_reqd(void)
|
||||
{
|
||||
size_t size;
|
||||
|
||||
size = sizeof(acpi_generic_error_status_t);
|
||||
|
||||
size += sizeof(acpi_hest_generic_data_v300_t);
|
||||
size += sizeof(cper_proc_generic_error_section_t);
|
||||
|
||||
size += sizeof(acpi_hest_generic_data_v300_t);
|
||||
size += sizeof(cper_ia32x64_proc_error_section_t);
|
||||
|
||||
/* Check Error */
|
||||
size += cper_ia32x64_check_sz();
|
||||
|
||||
/* Context of MCG_CAP, MCG_STAT, MCG_CTL */
|
||||
size += cper_ia32x64_ctx_sz_bytype(CPER_IA32X64_CTX_MSR, 3);
|
||||
|
||||
/* Context of MCi_CTL, MCi_STATUS, MCi_ADDR, MCi_MISC */
|
||||
size += cper_ia32x64_ctx_sz_bytype(CPER_IA32X64_CTX_MSR, 4);
|
||||
|
||||
/* Context of CTL_MASK */
|
||||
size += cper_ia32x64_ctx_sz_bytype(CPER_IA32X64_CTX_MSR, 1);
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
static enum cper_x86_check_type error_to_chktype(struct mca_bank_status *mci)
|
||||
{
|
||||
int error = mca_err_type(mci->sts);
|
||||
|
||||
if (error == MCA_ERRTYPE_BUS)
|
||||
return X86_PROCESSOR_BUS_CHK;
|
||||
if (error == MCA_ERRTYPE_INT)
|
||||
return X86_PROCESSOR_MS_CHK;
|
||||
if (error == MCA_ERRTYPE_MEM)
|
||||
return X86_PROCESSOR_CACHE_CHK;
|
||||
if (error == MCA_ERRTYPE_TLB)
|
||||
return X86_PROCESSOR_TLB_CHK;
|
||||
|
||||
return X86_PROCESSOR_MS_CHK; /* unrecognized */
|
||||
}
|
||||
|
||||
/* Fill additional information in the Generic Processor Error Section. */
|
||||
static void fill_generic_section(cper_proc_generic_error_section_t *sec,
|
||||
struct mca_bank_status *mci)
|
||||
{
|
||||
int type = mca_err_type(mci->sts);
|
||||
|
||||
if (type == MCA_ERRTYPE_BUS) /* try to map MCA errors to CPER types */
|
||||
sec->error_type = GENPROC_ERRTYPE_BUS;
|
||||
else if (type == MCA_ERRTYPE_INT)
|
||||
sec->error_type = GENPROC_ERRTYPE_UARCH;
|
||||
else if (type == MCA_ERRTYPE_MEM)
|
||||
sec->error_type = GENPROC_ERRTYPE_CACHE;
|
||||
else if (type == MCA_ERRTYPE_TLB)
|
||||
sec->error_type = GENPROC_ERRTYPE_TLB;
|
||||
else
|
||||
sec->error_type = GENPROC_ERRTYPE_UNKNOWN;
|
||||
sec->validation |= GENPROC_VALID_PROC_ERR_TYPE;
|
||||
}
|
||||
|
||||
/* Convert an error reported by an MCA bank into BERT information to be reported
|
||||
* by the OS. The ACPI driver doesn't recognize/parse the IA32/X64 structure,
|
||||
* which is the best method to report MSR context. As a result, add two
|
||||
* structures: A "processor generic error" that is parsed, and an IA32/X64 one
|
||||
* to capture complete information.
|
||||
*
|
||||
* Future work may attempt to interpret the specific Family 15h error symptoms
|
||||
* found in the MCA registers. This data could enhance the reporting of the
|
||||
* Processor Generic section and the failing error/check added to the
|
||||
* IA32/X64 section.
|
||||
*/
|
||||
static void build_bert_mca_error(struct mca_bank_status *mci)
|
||||
{
|
||||
acpi_generic_error_status_t *status;
|
||||
acpi_hest_generic_data_v300_t *gen_entry;
|
||||
acpi_hest_generic_data_v300_t *x86_entry;
|
||||
cper_proc_generic_error_section_t *gen_sec;
|
||||
cper_ia32x64_proc_error_section_t *x86_sec;
|
||||
cper_ia32x64_proc_error_info_t *chk;
|
||||
cper_ia32x64_context_t *ctx;
|
||||
|
||||
if (mca_report_size_reqd() > bert_storage_remaining())
|
||||
goto failed;
|
||||
|
||||
status = bert_new_event(&CPER_SEC_PROC_GENERIC_GUID);
|
||||
if (!status)
|
||||
goto failed;
|
||||
|
||||
gen_entry = acpi_hest_generic_data3(status);
|
||||
gen_sec = section_of_acpientry(gen_sec, gen_entry);
|
||||
|
||||
fill_generic_section(gen_sec, mci);
|
||||
|
||||
x86_entry = bert_append_ia32x64(status);
|
||||
x86_sec = section_of_acpientry(x86_sec, x86_entry);
|
||||
|
||||
chk = new_cper_ia32x64_check(status, x86_sec, error_to_chktype(mci));
|
||||
if (!chk)
|
||||
goto failed;
|
||||
|
||||
ctx = cper_new_ia32x64_context_msr(status, x86_sec, IA32_MCG_CAP, 3);
|
||||
if (!ctx)
|
||||
goto failed;
|
||||
ctx = cper_new_ia32x64_context_msr(status, x86_sec, IA32_MC_CTL(mci->bank), 4);
|
||||
if (!ctx)
|
||||
goto failed;
|
||||
ctx = cper_new_ia32x64_context_msr(status, x86_sec, MC_CTL_MASK(mci->bank), 1);
|
||||
if (!ctx)
|
||||
goto failed;
|
||||
|
||||
return;
|
||||
|
||||
failed:
|
||||
/* We're here because of a hardware error, don't break something else */
|
||||
printk(BIOS_ERR, "Error: Not enough room in BERT region for Machine Check error\n");
|
||||
}
|
||||
|
||||
static const char *const mca_bank_name[] = {
|
||||
[0] = "Load-store unit",
|
||||
[1] = "Instruction fetch unit",
|
||||
|
|
|
|||
Loading…
Reference in New Issue