soc/amd/exit_car.S: Drop redundant enabling cache
This is already done in arch/x86/exit_car.S Change-Id: Ie954aa11d5e76aaa3e2185ba552aafe8d075feb6 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37179 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
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@ -29,9 +29,4 @@ chipset_teardown_car:
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AMD_DISABLE_STACK
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AMD_DISABLE_STACK
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/* enable cache */
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movl %cr0, %eax
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andl $(~(CR0_CD | CR0_NW)), %eax
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movl %eax, %cr0
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jmp *%esp
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jmp *%esp
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